Dual P-Type Gate Metal Stack for Flatband Voltage Control

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Solution Overview

Problem

As semiconductor devices continue to shrink in feature size, challenges arise in maintaining device performance and integration density, particularly in forming effective gate structures for transistors that require improved flatband voltage and threshold voltage control.

Innovation Solution

The use of a fluorine-treated work function metal (WFM) layer, where an aluminum treatment is performed before fluorine soak to increase the effectiveness of the fluorine treatment, allowing fluorine to diffuse into the underlying gate dielectric, thereby enhancing the flatband voltage and reducing the threshold voltage of the transistor.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional gate structures are used in scaled devices, then manufacturing is simpler, but flatband voltage control and threshold voltage control deteriorate

Engineering Contradiction:
Improveflatband voltage controlVSAvoidgate structure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies parameter changes by introducing fluorine treatment to modify the work function metal layer properties. The fluorine soak process changes the chemical composition and electrical characteristics of the gate structure, enabling improved flatband voltage control through parameter modification rather than structural redesign.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The aluminum treatment is performed before fluorine soak as a preliminary action to enhance the effectiveness of the subsequent fluorine treatment. This sequential approach prepares the work function metal layer by first incorporating aluminum, which then facilitates greater fluorine diffusion and more effective flatband voltage control.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If feature size is reduced to increase integration density, then more components fit in given area, but device performance control becomes more difficult

Engineering Contradiction:
Improveintegration densityVSAvoidthreshold voltage control
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent uses parameter changes in the gate structure's chemical composition (fluorine and aluminum treatment) to maintain threshold voltage control as device dimensions scale down. This allows integration density to increase while preserving electrical performance through material property modification rather than geometric scaling alone.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If fluorine treatment is applied to work function metal layer, then flatband voltage increases towards band edge, but process complexity increases

Engineering Contradiction:
Improveflatband voltageVSAvoidprocess steps
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The aluminum treatment acts as an intermediary step that enhances the effectiveness of fluorine treatment. By first incorporating aluminum into the work function metal layer, the structure becomes more receptive to fluorine diffusion, achieving the desired flatband voltage control while potentially reducing the complexity or aggressiveness of the fluorine soak process itself.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach improves device performance by increasing the flatband voltage towards the band edge of the metal, decreasing the threshold voltage, and enhancing overall transistor performance.

Implementation Method 1

allowing fluorine to diffuse into the underlying gate dielectric

Methodology Applied
Scientific EffectDiffusion: Diffusion

Data Source

PatentUS20240371963A1Semiconductor device gate structures
Publication Date: 2024.11.07 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240371963A1 patent drawing
  • US20240371963A1 patent drawing
  • US20240371963A1 patent drawing

AI summary

In an embodiment, a device includes: a first channel region; a second channel region; and a gate structure around the first channel region and the second channel region, the gate structure including: a gate dielectric layer; a first p-type work function metal on the gate dielectric layer, the first p-type work function metal including fluorine and aluminum; a second p-type work function metal on the first p-type work function metal, the second p-type work function metal having a lower concentration of fluorine and a lower concentration of aluminum than the first p-type work function metal; and a fill layer on the second p-type work function metal.