Dual Gate III-Nitride FET for Threshold Voltage Stability
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Solution Overview
Problem
Normally-off GaN transistors experience threshold voltage drift under large drain bias, which affects the stability and reliability of high-voltage III-Nitride power transistors.
Innovation Solution
A dual gate field effect transistor design is implemented, featuring a III-nitride channel layer, barrier layer, and dielectric structures, with a second gate electrode that shields the first gate electrode from drain biases, preventing significant threshold voltage shifts during high voltage stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If field plates are used to reduce electric field on gate electrode, then reliability of gate structure is improved, but threshold voltage drift occurs under large drain bias
Solution Approach 1:
The gate structure is segmented into two separate gate electrodes (first gate electrode and second gate electrode) with different functions. The first gate electrode controls the channel current while the second gate electrode serves as a field plate to reduce electric field stress. This segmentation allows each gate to be optimized for its specific function, resolving the contradiction between reliability improvement and threshold voltage stability.
Solution Approach 2:
A dielectric layer is introduced as an intermediary between the first gate electrode and the second gate electrode. This dielectric mediator allows the two gates to be electrically isolated while maintaining their spatial relationship, enabling the first gate to control the channel without being directly affected by the high voltage stress managed by the second gate.
2Power
If high voltage stress is applied to achieve high voltage operation, then power handling capability is improved, but threshold voltage shifts occur
Solution Approach 1:
The gate structure is divided into two functional segments: the first gate electrode for channel control and the second gate electrode for electric field management. This segmentation enables the device to operate at high voltages while the first gate remains protected from direct exposure to high voltage stress, maintaining threshold voltage stability.
Solution Approach 2:
The dielectric layer acts as an intermediary that electrically isolates the first gate electrode from the high voltage environment managed by the second gate electrode. This intermediary protection allows high voltage operation without direct coupling between the control gate and the high voltage stress, preventing threshold voltage shifts.
3Reliability
If field plates are used to protect gate electrode, then device reliability is improved, but device complexity increases
Solution Approach 1:
The gate structure is segmented into two distinct gate electrodes with different functions. The first gate electrode maintains the simple control function while the second gate electrode provides the field plate protection. This segmentation achieves improved reliability without requiring a completely complex new structure, as each segment builds upon conventional elements.
Solution Approach 2:
The second gate electrode serves multiple functions: it acts as a field plate to reduce electric field stress, provides voltage stress management, and protects the first gate electrode. This multi-functionality reduces the need for additional separate protection structures, thereby limiting the increase in overall device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The dual gate structure effectively stabilizes the threshold voltage, ensuring reliable operation by limiting voltage drop across the first gate electrode and maintaining stable device performance under large drain biases.
Implementation Method 1
a second gate electrode filling the second gate trench... the second gate structure disposed between the first gate structure and the drain electrode
Data Source
AI summary
A field effect transistor (FET) includes a III-nitride channel layer, a III-nitride barrier layer on the channel layer, a first dielectric on the barrier layer, a first gate trench extending through the first dielectric, and partially or entirely through the barrier layer, a second dielectric on a bottom and walls of the first gate trench, a source electrode on a first side of the first gate trench, a drain electrode on a second side of the first gate trench opposite the first side, a first gate electrode on the second dielectric and filling the first gate trench, a third dielectric between the first gate trench and the drain electrode, a second gate trench extending through the third dielectric and laterally located between the first gate trench and the drain electrode, and a second gate electrode filling the second gate trench.