Dual-Gate III-Nitride Transistor Shielding Voltage Stress

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Solution Overview

Problem

III-N semiconductor devices face challenges with threshold voltage drift under voltage stress, particularly in enhancement-mode devices, which affects their reliability and stability.

Innovation Solution

The implementation of dual-gate enhancement/depletion devices in a cascode configuration helps prevent threshold voltage drift by physically separating the E-mode gate from high electric fields, using fluorine ions to deplete electrons in the channel and incorporating a D-mode gate to shield the E-mode gate from stress.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If fluorine implantation is used to create enhancement-mode devices, then device operation at higher temperatures and breakdown voltages is achieved, but threshold voltage drift occurs under voltage stress

Engineering Contradiction:
Improveoperating temperatureVSAvoidthreshold voltage stability
Core Design Contradiction:
TemperatureVSReliability

Solution Approach 1:

The device is divided into two separate gates: a first gate (E-mode gate) that controls the enhancement-mode channel and a second gate (D-mode gate) that controls the depletion-mode channel. This segmentation allows each gate to be optimized for its specific function, with the D-mode gate shielding the E-mode gate from voltage stress that causes threshold voltage drift.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The D-mode gate acts as an intermediary or shield between the high electric field conditions and the E-mode gate. By placing the D-mode gate in a cascode configuration, it intercepts and shields the E-mode gate from voltage stress, preventing the threshold voltage drift that would otherwise occur in the enhancement-mode device.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If dual-gate cascode configuration is used to prevent threshold voltage drift, then device stability is improved, but drive capability is minimally degraded

Engineering Contradiction:
Improvedevice stabilityVSAvoiddrive capability
Core Design Contradiction:
ReliabilityVSPower

Solution Approach 1:

The device operates dynamically by controlling which gate is active based on the desired operating mode. The first gate controls enhancement-mode operation when high stability is needed, while the second gate provides depletion-mode operation when maximum drive capability is required. This dynamic switching allows optimization of both stability and power output depending on operating conditions.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The device utilizes parameter changes by switching between enhancement-mode and depletion-mode operation through the two gates. The E-mode gate provides stable threshold voltage operation, while the D-mode gate enables higher drive capability when needed. This parameter switching allows the device to achieve both stability and power output by selecting the appropriate operating mode.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances the stability and reliability of the devices, maintaining minimal degradation in drive capability and preventing persistent negative shifts in threshold voltage, even under high electric-field and thermal stress.

Implementation Method 1

using fluorine implantation to introduce fixed charge into the top (higher-bandgap) layer of a HEMT-like device

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

using dual-gate enhancement/depletion devices, especially if the gates are connected in a cascode configuration... the D-mode gate to shield the E-mode gate from stress

Methodology Applied
Scientific EffectElectric field shielding: Electric Field

Data Source

PatentUS8502323B2Reliable normally-off III-nitride active device structures, and related methods and systems
Publication Date: 2013.08.06 THE HONG KONG UNIV OF SCI & TECH
  • US8502323B2 patent drawing
  • US8502323B2 patent drawing
  • US8502323B2 patent drawing

AI summary

A field-effect transistor includes a first gate, a second gate held at a substantially fixed potential in a cascode configuration, and a semiconductor channel. The semiconductor channel has an enhancement mode portion and a depletion mode portion. The enhancement mode portion is gated to be turned on and off by the first gate, and has been modified to operate in enhancement mode. The depletion mode portion is gated by the second gate, and has been modified to operate in depletion mode and that is operative to shield the first gate from voltage stress.