Dual-Gate Array Substrate Layout for Higher Opening Ratio
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Solution Overview
Problem
Conventional dual-gate array substrates face challenges in increasing the opening ratio and transmission while reducing the cost of the drive integrated circuit, as they require additional components that decrease the opening ratio and transmission.
Innovation Solution
The dual-gate array substrate design includes alternately arranged primary and secondary signal lines, with main electrodes covering primary signal lines to shield coupling capacitance and secondary signal lines connected to common electrodes to prevent unwanted capacitance, allowing for a reduced size of main electrodes and increased opening ratio without compromising transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional dual-gate array substrate design is used to reduce drive IC cost, then drive circuit cost is reduced, but opening ratio and transmission are decreased
Solution Approach 1:
The signal lines are divided into two types: primary signal lines connected to drive units and secondary signal lines connected to common electrodes. This segmentation allows different functional optimization for each line type, enabling cost reduction through dual-gate drive while maintaining opening ratio by having secondary lines serve dual purposes
Solution Approach 2:
Secondary signal lines serve multiple functions: they act as data lines for pixel units and simultaneously serve as connection lines to common electrodes. This multi-functionality reduces the need for separate dedicated lines, thereby improving opening ratio while maintaining the dual-gate drive configuration
2Reliability
If main electrodes are enlarged to cover primary signal lines for shielding coupling capacitance, then coupling capacitance is reduced, but opening ratio is decreased
Solution Approach 1:
Secondary signal lines act as intermediaries between primary signal lines and common electrodes. By routing secondary lines through the gaps between pixel electrodes and connecting them to common electrodes, the patent provides capacitance shielding without requiring main electrodes to extend into pixel regions, thus maintaining opening ratio
Solution Approach 2:
The patent utilizes the vertical dimension and gap spaces between pixel electrodes to route secondary signal lines and position main electrodes. Instead of expanding main electrodes horizontally into pixel areas (which would reduce opening ratio), the solution uses the available vertical and inter-pixel gap dimensions to achieve capacitance shielding
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the opening ratio and transmission of the dual-gate array substrate by avoiding coupling capacitance and reducing the need for larger main electrodes, thereby improving display performance and reducing costs.
Implementation Method 1
an orthographic projection of the main electrode on the dual-gate array substrate has overlapping regions respectively with orthographic projections of corresponding ones, adjacent to the main electrodes, of the pixel electrodes on the dual-gate array substrate and at least covers the primary signal line
Implementation Method 2
the secondary signal lines being connected to the common electrodes
Data Source
AI summary
A dual-gate array substrate includes: a plurality of gate lines arranged in a first direction and each extended in a second direction that is perpendicular to the first direction; a plurality of primary signal lines and secondary signal lines arranged alternately in the second direction and extended in the first direction; and a plurality of pixel units. The primary signal lines are connected to a drive unit, and connected respectively to the pixel units that are adjacent thereto. Common electrodes include a plurality of main electrodes and a plurality of branching electrodes. An orthographic projection of the main electrode on the dual-gate array substrate does not overlap with those of corresponding ones, adjacent to the main electrode, of the pixel electrodes and at least covers the primary signal line. Each gate line includes a protrusion protruded in the first direction.