Dual Gate Oxide Analog Circuit Biasing for Speed and Signal Swing
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Solution Overview
Problem
Existing analog circuit architectures are limited by the need for large geometry devices to withstand high bias voltages, which results in slower speeds, increased power consumption, and reduced integration due to the inability to fully utilize small geometry devices at higher voltages.
Innovation Solution
A multiple bias, multi-gate analog circuit architecture that provides different bias voltages to thin-oxide and thick-oxide transistors, allowing each to operate within their optimal range, thereby leveraging their respective strengths for improved signal processing and reduced power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If thick gate oxide devices are used to withstand high bias voltage, then voltage tolerance is improved, but device speed and integration density deteriorate
Solution Approach 1:
The circuit is segmented into multiple domains with different voltage levels. Thick oxide devices operate in high-voltage domains while thin oxide devices operate in low-voltage domains, allowing each segment to be optimized for its specific voltage requirement without compromising overall system performance.
Solution Approach 2:
Different regions of the circuit are assigned different oxide thicknesses based on their specific functional requirements. High-voltage tolerant sections use thick oxide devices, while speed-critical sections use thin oxide devices, creating local optimization throughout the circuit architecture.
2Reliability
If thick gate oxide devices are used to withstand high bias voltage, then voltage tolerance is improved, but power consumption and area increase
Solution Approach 1:
The circuit is divided into voltage domains where only the necessary portions use thick oxide devices for high voltage tolerance, while other portions use energy-efficient thin oxide devices, reducing overall power consumption and area.
Solution Approach 2:
Thick oxide devices are deployed only in specific locations where high voltage tolerance is required, rather than throughout the entire circuit, minimizing the area and power overhead associated with thick oxide technology.
3Device complexity
If single voltage bias is applied to all devices, then circuit simplicity is maintained, but performance optimization is limited
Solution Approach 1:
The circuit employs dynamic voltage domains that can be independently controlled and adjusted. Different voltage levels are applied to different parts of the circuit based on operational requirements, enabling performance optimization without significantly increasing circuit complexity.
Data Source
AI summary
An analog circuit architecture is fabricated with dual gate oxides and dual voltage supplies. In the analog circuit architecture, different kinds of devices/transistors with different gate oxide thicknesses are biased by different voltages, such that advantages of each device technology are mixed to enhance total performance of the analog circuit. For example, thin oxide 0.18 um transistors are biased at 1.8V for higher speed and lower power consumption, whereas thick oxide 0.35 um transistors are biased at 3.3V for a wider signal swing range.