Dual Gate Oxide Semiconductor Device for Breakdown Voltage

Solution Overview

Problem

Conventional semiconductor devices face a trade-off between increasing breakdown voltage and specific on resistance, where improvements in breakdown voltage often lead to increased on resistance, and vice versa, with a need for reducing the size of power semiconductor devices while maintaining or reducing on resistance.

Innovation Solution

The implementation of a dual dielectric layer structure with a thin gate oxide layer adjacent to a thick gate oxide layer and an isolation layer, along with a two-conductive layer structure, including a stepped polysilicon layer and an inter-conductor oxide layer, to enhance breakdown voltage without significantly increasing on resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the concentration of dopant in the drift region is reduced to increase breakdown voltage, then the breakdown voltage increases, but the specific on resistance increases

Engineering Contradiction:

Improvebreakdown voltageVSAvoidspecific on resistance

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The gate oxide layer is segmented into two distinct regions: a first gate oxide region with a first thickness and a second gate oxide region with a second thickness greater than the first. This segmentation allows different portions of the device to have optimized characteristics - the thinner oxide region reduces on-resistance while the thicker oxide region increases breakdown voltage, thereby resolving the contradiction between these two parameters.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different regions of the gate oxide layer are assigned different qualities (thicknesses) to fulfill different functions. The first gate oxide region has a thinner thickness optimized for reducing on-resistance in areas where high current flows, while the second gate oxide region has a thicker thickness optimized for increasing breakdown voltage in areas requiring higher voltage tolerance. This local differentiation resolves the contradiction by allowing each region to optimize for its specific function.

Inventive Principle:

Principle #3Local quality

2Reliability

If the length of the drift region is increased to compensate for reduced dopant concentration, then the breakdown voltage increases, but the specific on resistance increases

Engineering Contradiction:

Improvebreakdown voltageVSAvoiddrift region length

Core Design Contradiction:

ReliabilityVSLength of moving object

Solution Approach 1:

The gate oxide layer is segmented into two distinct regions: a first gate oxide region with a first thickness and a second gate oxide region with a second thickness greater than the first. This segmentation allows different portions of the device to have optimized characteristics - the thinner oxide region reduces on-resistance while the thicker oxide region increases breakdown voltage, thereby resolving the contradiction between these two parameters.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The invention changes the parameter of gate oxide thickness from a uniform value to a spatially varying value with two distinct thicknesses. This parameter change allows the device to achieve both high breakdown voltage (through the thicker oxide region) and low on-resistance (through the thinner oxide region) without needing to increase the drift region length, thus resolving the contradiction.

Inventive Principle:

Principle #35Parameter changes

3Area of stationary object

If the size of power semiconductor devices is reduced, then the device area decreases, but the on resistance increases

Engineering Contradiction:

Improvedevice areaVSAvoidon resistance

Core Design Contradiction:

Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

Different regions of the gate oxide layer are assigned different qualities (thicknesses) to fulfill different functions. The first gate oxide region has a thinner thickness optimized for reducing on-resistance in areas where high current flows, while the second gate oxide region has a thicker thickness optimized for increasing breakdown voltage in areas requiring higher voltage tolerance. This local differentiation resolves the contradiction by allowing each region to optimize for its specific function.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

Instead of reducing device area uniformly, the invention introduces a vertical dimension variation in the gate oxide thickness. By varying the oxide thickness vertically across different regions, the device achieves both small area and low on-resistance simultaneously, as the thinner oxide regions provide lower resistance paths without requiring a larger overall device footprint.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS9653561B2Low on resistance semiconductor device

Publication Date: 2017.05.16 MACRONIX INTERNATIONAL CO LTD

AI summary

A semiconductor device is provided having a dual dielectric layer structure defined by a thin dielectric layer adjacent to a thick dielectric layer. More particularly, a high voltage metal oxide semiconductor transistor having a dual gate oxide layer structure comprising a thin gate oxide layer adjacent to a thick oxide/thin oxide layer may be provided. Such structures may be used in extended drain metal oxide semiconductor field effect transmitters, laterally diffused metal oxide field effect transistors, or any high voltage metal oxide semiconductor transistor. Methods of fabricating an extended drain metal oxide semiconductor transistor device are also provided.