Dual-Gate Oxide Semiconductor Transistor Signal Delay Reduction
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Solution Overview
Problem
Inverted staggered transistors with oxide semiconductor films in display devices suffer from increased signal delay due to parasitic capacitance and larger occupation area, which degrades image quality as screen size and resolution increase.
Innovation Solution
A semiconductor device with a dual-gate structure, comprising a bottom-gate transistor and a top-gate transistor, where the oxide semiconductor films include In, M (M being Al, Ga, Y, or Sn), and Zn, with a multilayer structure and c-axis alignment, and the insulating films contain excess oxygen to reduce oxygen vacancies and impurities, enhancing field-effect mobility and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If an inverted staggered transistor with oxide semiconductor film is used, then the manufacturing process is simple and manufacturing cost is low, but signal delay increases due to parasitic capacitance and occupation area increases
Solution Approach 1:
The transistor is divided into two separate gate structures: a bottom gate electrode and a top gate electrode, with the oxide semiconductor film positioned between them. This segmentation allows independent optimization of each gate's function, reducing parasitic capacitance effects while maintaining manufacturing simplicity through sequential formation processes
Solution Approach 2:
The invention transitions from a planar single-gate structure to a three-dimensional dual-gate structure by adding the top gate electrode above the oxide semiconductor film. This dimensional change enables better electrical characteristics and reduced parasitic capacitance while maintaining compatibility with existing manufacturing processes
2Ease of manufacture
If an inverted staggered transistor with oxide semiconductor film is used, then the manufacturing process is simple and manufacturing cost is low, but occupation area increases
Solution Approach 1:
By segmenting the gate into bottom and top portions, the invention achieves better electrical control with reduced parasitic capacitance, allowing for more compact transistor designs that reduce occupation area while maintaining manufacturing simplicity through established sequential processing techniques
3Reliability
If the oxide semiconductor film includes In, M (Al, Ga, Y, or Sn), and Zn with multilayer structure and c-axis alignment, then field-effect mobility and reliability increase, but manufacturing complexity increases
Solution Approach 1:
The invention optimizes specific parameters of the oxide semiconductor film including compositional ratios (In:M:Zn), crystalline orientation (c-axis alignment), and layer thickness to achieve high field-effect mobility and reliability. These parameter optimizations are implemented through controlled sputtering conditions and heat treatment processes that, while requiring precision, follow established manufacturing protocols
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The dual-gate structure reduces signal delay and occupation area, improving image quality by increasing field-effect mobility and reliability, while maintaining low manufacturing costs and simplicity.
Implementation Method 1
the oxide semiconductor films include In, M (M being Al, Ga, Y, or Sn), and Zn, with a multilayer structure and c-axis alignment
Implementation Method 2
the insulating films contain excess oxygen to reduce oxygen vacancies and impurities
Data Source
AI summary
To provide a novel semiconductor device including an oxide semiconductor film. The semiconductor device includes a first transistor and a second transistor. The first transistor includes a first gate electrode, a first insulating film over the first gate electrode, a first oxide semiconductor film over the first insulating film, a source electrode electrically connected to the first oxide semiconductor film, a drain electrode electrically connected to the first oxide semiconductor film, a second insulating film over the first oxide semiconductor film, a second oxide semiconductor film functioning as a second gate electrode, over the second insulating film, and a third insulating film over the second oxide semiconductor film. The second transistor includes a third oxide semiconductor film including a channel region, a source region, and a drain region over the second insulating film, a fourth insulating film over the channel region, a third gate electrode over the fourth insulating film, and the third insulating film over the source region and the drain region.