Dual-Gate Oxide Semiconductor Synapse for Precise Weight Programming
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Solution Overview
Problem
Existing synapse devices fail to efficiently and accurately learn neural network weights due to high power consumption, non-uniform device responses, and complex circuitry, especially when arrayed, limiting their scalability and efficiency in artificial neural networks.
Innovation Solution
A synapse device using an oxide semiconductor transistor with a dual gate structure, comprising a write transistor and a read transistor, allows selective adjustment of weight values through pulse input, utilizing a dual gate structure to control threshold voltage and enable stochastic parallel updates, reducing power consumption and programming errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a synapse device uses conventional transistor structures (single gate), then the device can perform basic weight storage and multiplication functions, but it cannot selectively adjust threshold voltage to program only desired cells when arrayed, leading to cross-talk and programming errors
Solution Approach 1:
The transistor gate is segmented into two separate gates: a first gate electrode and a second gate electrode. This segmentation allows independent control of threshold voltage through the first gate while maintaining basic transistor operation through the second gate, enabling selective cell programming without increasing overall circuit complexity
Solution Approach 2:
The control mechanism is extended from one dimension (single gate voltage control) to two dimensions by introducing a second gate electrode that can independently adjust threshold voltage. This dimensional extension enables precise selection and programming of specific cells within the synapse array without affecting other cells
2Speed
If the synapse device uses high power for fast operation, then data processing speed increases, but power consumption increases significantly, reducing energy efficiency
Solution Approach 1:
The synapse device utilizes periodic pulse signals to program weight values rather than continuous high-power operation. The dual gate structure enables selective activation during pulse intervals, achieving fast weight updates while minimizing average power consumption through intermittent operation
Solution Approach 2:
The threshold voltage parameter is dynamically changed through the first gate electrode voltage control during programming operations, enabling fast and efficient weight value updates. This parameter change allows the transistor to switch between low-power standby state and high-speed operation state only when needed
3Measurement precision
If weight values are adjusted in a wide range to improve learning accuracy, then neural network learning accuracy improves, but device response becomes non-uniform and programming errors increase
Solution Approach 1:
The dual gate structure provides local quality control by enabling independent threshold voltage adjustment for each cell through the first gate electrode. This allows each cell to have optimized threshold voltage settings tailored to its specific programming requirements, ensuring uniform device response across the array even when adjusting weights in a wide range
4Stability of the object's composition
If the synapse device stores weight values to maintain them during inference, then non-volatility is achieved, but the device cannot perform fast operations with low power consumption simultaneously
Solution Approach 1:
The oxide semiconductor transistor structure provides self-service weight retention through its inherent non-volatile characteristics. The dual gate structure enhances this by allowing the transistor to maintain threshold voltage settings without continuous power supply, enabling both non-volatility and low-power operation simultaneously during inference phases
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The dual gate structure enables efficient, low-power learning of neural network weights with reduced errors and increased scalability, allowing for large-scale neural network operations with improved power efficiency and reduced time consumption.
Implementation Method 1
a dual gate structure including a bottom gate located below a thin oxide semiconductor layer, and a top gate located above the thin oxide semiconductor layer
Implementation Method 2
a thin oxide semiconductor layer formed over the bottom gate insulator
Data Source
AI summary
A synapse device may include an oxide semiconductor transistor divided into a write transistor and a read transistor. The write transistor is an oxide semiconductor transistor having a dual gate including a bottom gate located below a thin oxide semiconductor layer and a top gate located above the thin oxide semiconductor layer.