Dual-Gate Oxide Semiconductor Transistor for Threshold Stability
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Solution Overview
Problem
Conventional oxide semiconductor devices face challenges with low field-effect mobility and reliability issues due to threshold voltage shifts and junction degradation under strong electric fields, particularly in transistors with polycrystalline structures.
Innovation Solution
A semiconductor device design featuring a dual-gate transistor configuration with a first gate electrode overlapping the oxide semiconductor layer in two directions, shielding critical junctions and using a polycrystalline oxide semiconductor layer with controlled crystal structures and reduced oxygen defects to enhance reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional oxide semiconductor layer is used, then the device can be manufactured with standard processes, but the field-effect mobility remains low and threshold voltage shifts occur under strong electric fields
Solution Approach 1:
The patent changes the crystalline structure parameter of the oxide semiconductor from amorphous or simple polysilicon to a specific polycrystalline structure with controlled grain boundaries and crystal orientations. This parameter change simultaneously improves field-effect mobility (speed) while maintaining threshold voltage stability through the ordered atomic arrangement that reduces defect states
Solution Approach 2:
The patent creates a composite structure by combining the polycrystalline oxide semiconductor layer with specific gate insulating films and electrode configurations. The composite material approach allows optimization of each layer's properties to achieve both high mobility and voltage stability, with the polycrystalline structure providing high carrier mobility while the overall device architecture ensures threshold voltage stability
2Reliability
If the first gate electrode protrudes in multiple directions to shield junctions, then reliability improves by reducing parasitic resistance, but device complexity increases
Solution Approach 1:
The patent extends the first gate electrode into additional spatial dimensions by making it protrude in multiple directions (lengthwise and widthwise) beyond the conventional single-plane configuration. This dimensional extension allows the gate to shield junction regions from strong electric fields and reduce parasitic resistance, improving reliability without requiring additional gate structures
Solution Approach 2:
The extended first gate electrode structure serves multiple functions simultaneously: it acts as the primary control electrode for the transistor, provides shielding for the source and drain junctions against strong electric fields, and reduces parasitic resistance through increased overlap area. This multi-functionality improves reliability without proportionally increasing device complexity
Data Source
AI summary
A semiconductor device including a transistor, the transistor includes a first gate electrode, a first gate insulating film provided on the first gate electrode, an oxide semiconductor layer provided on the first gate insulating film, overlapping the first gate electrode, and having a polycrystalline structure, a second gate insulating film provided on the oxide semiconductor layer, and a second gate electrode provided on the second gate insulating film and overlapping the first gate electrode, wherein the first gate electrode has a first region and a second region, the first region overlaps the oxide semiconductor layer and protrudes in a first direction from the second gate electrode in a plan view, and the second region overlaps the second gate electrode and protrudes in a second direction that intersects the first direction from the oxide semiconductor layer in a plan view.