Dual-Gate Semiconductor Device for AC Stress Deterioration
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Solution Overview
Problem
Semiconductor devices, particularly those with oxide semiconductors, face property deterioration due to AC stress deterioration, which affects reliability, especially at electrode edges, and existing technologies struggle to independently control electric fields effectively to mitigate this issue.
Innovation Solution
A semiconductor device structure with a dual-gate configuration, including a first and second gate electrode, insulating films, and electrodes, allows independent potential control to generate different electric field intensities between the electrodes, suppressing AC stress deterioration by adjusting potential differences and film thicknesses to relax electric fields at electrode edges.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional single-gate structure is used, then the device structure is simple, but AC stress deterioration occurs at electrode edges affecting reliability
Solution Approach 1:
The gate structure is segmented into a first gate electrode and a second gate electrode that are spatially separated and independently controllable. This segmentation allows independent potential control of each gate electrode, enabling separate optimization of electric fields at different electrode regions to suppress AC stress deterioration without excessive complexity
Solution Approach 2:
Different potential differences are applied between the first gate electrode and source/drain electrodes, and between the second gate electrode and source/drain electrodes. This local quality approach creates different electric field intensities at different locations, specifically relaxing the electric field at the drain electrode edge where AC stress deterioration occurs most severely
2Productivity
If high electric field intensity is applied to improve device performance, then switching performance improves, but AC stress deterioration accelerates at electrode edges
Solution Approach 1:
The potential differences between gate electrodes and source/drain electrodes are made dynamically adjustable. By independently controlling the potentials of the first and second gate electrodes, the electric field distribution can be optimized to maintain high switching performance while reducing peak electric field intensity at electrode edges to prevent AC stress deterioration
Solution Approach 2:
The invention changes the electrical parameters (potential differences) applied to different gate electrodes to optimize performance. Specifically, the potential difference between the second gate electrode and drain electrode is controlled to be smaller than that between the first gate electrode and source electrode, which relaxes the electric field at the drain edge and suppresses AC stress deterioration while maintaining overall device performance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses AC stress deterioration, enhancing the reliability of semiconductor devices by independently controlling electric fields, particularly at drain electrode edges, and is more effective for oxide semiconductor devices.
Implementation Method 1
independently controlling potentials respectively supplied to the first gate electrode and the second gate electrode... generate different electric field intensities between the electrodes
Data Source
AI summary
The semiconductor device includes a first gate electrode, a first gate insulating film, a semiconductor film, a first electrode, a second electrode, a second gate insulating film, and a second gate electrode. The first gate insulating film is located over the first gate electrode. The semiconductor film is located over the first gate insulating film and overlaps with the first gate electrode. The first electrode and the second electrode are each located over and in contact with the semiconductor film. The second gate insulating film is located over the first electrode and the second electrode. The second gate electrode is located over the second gate insulating film and overlaps with the second electrode and the first gate electrode. The first electrode is completely exposed from the second gate electrode.