Dual Gate Oxide TFT Data Line Integration
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Solution Overview
Problem
The stability and manufacturing complexity of dual gate oxide thin-film transistors pose challenges in mass production, leading to higher costs and reduced efficiency in display technology applications.
Innovation Solution
A dual gate oxide thin-film transistor design with a substrate, bottom and top gate electrodes, semiconductor layer, and ITO film layers, where the data line and gate electrodes share a metal layer, and plasma treatment is used to form source and drain electrodes, simplifying the manufacturing process and reducing the number of masks required.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a dual gate structure is used to improve stability, then the stability of the thin-film transistor is improved, but the device complexity and manufacturing cost increase
Solution Approach 1:
The data line and gate electrode are merged into the same metal layer, forming a conductive layer that serves both functions. This reduces the number of separate structures needed while maintaining the dual gate configuration's stability benefits.
Solution Approach 2:
The metal layer containing the data line is designed to also function as the gate electrode layer. This multi-functional design allows the same structural element to serve multiple purposes: data transmission and gate control, thereby reducing overall device complexity.
2Reliability
If a dual gate structure is used to improve stability, then the stability of the thin-film transistor is improved, but the manufacturing cost increases
Solution Approach 1:
By combining the data line and gate electrode into the same metal layer, the number of deposition and patterning steps is reduced. This merging of functions directly lowers manufacturing complexity and associated costs.
Solution Approach 2:
The data line and gate electrode are formed simultaneously in the same metal layer during the manufacturing process. This preliminary integration avoids the need for separate formation steps, reducing overall manufacturing cost.
3Manufacturing precision
If conventional manufacturing processes are used for dual gate oxide TFTs, then the structure can be formed, but the manufacturing process is complex and productivity is reduced
Solution Approach 1:
The data line and gate electrode are formed in the same metal layer using a single deposition and patterning process. This merging eliminates the need for separate processing steps, thereby improving manufacturing efficiency and productivity.
Solution Approach 2:
Both the data line and gate electrode structures are prepared in advance within the same metal layer formation step. This preliminary action reduces the total number of processing steps required, enhancing manufacturing throughput.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances the stability and performance of the thin-film transistor, reduces production costs, and increases response speed by minimizing internal defects and RC time delay, while simplifying the manufacturing process.
Implementation Method 1
the source electrode and the drain electrode are obtained through performing a plasma treatment to the semiconductor layer
Data Source
AI summary
A dual gate oxide thin-film transistor and manufacturing method for the same. The thin-film transistor comprises: a substrate; a bottom gate electrode formed on the substrate; a first gate insulation layer disposed on the bottom gate electrode; a semiconductor layer formed on the first gate insulation layer; a second gate insulation layer formed on the semiconductor layer; and a top gate electrode formed on the second gate insulation layer; wherein, the transistor further comprises a data line, the data line and the bottom gate electrode, or the data line and the top gate electrode are located at a same metal layer. Because the data line and the bottom gate (or the top gate) electrodes are located at a same metal layer, and through one photolithography for patterning to reduce the number of the mask, decrease the production cost. Besides, the stability and the response speed are increased.