Dual Gate Thin Film Transistor Gate Driver Leakage Control
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Solution Overview
Problem
Integrated gate drivers in display panels experience leakage currents and timing delays in voltage transitions, leading to deteriorated output and transverse line defects, especially in varying temperature environments.
Innovation Solution
The implementation of a gate driver with dual gate thin film transistors and an inverter signal control system, where each stage receives clock signals, low voltages, and transmission signals to precisely manage gate-on and gate-off voltages, preventing voltage level decreases and timing delays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a gate driver is integrated on the display panel, then manufacturing costs are reduced by omitting additional gate driving chips, but leakage current increases and output quality deteriorates
Solution Approach 1:
The patent applies parameter changes by utilizing different voltage levels (first high voltage, second high voltage, first low voltage, second low voltage) to control the dual gate thin film transistors. By changing the voltage parameters applied to the first and second control terminals, the transistor operates in different modes to prevent leakage current and maintain output quality during both gate-on and gate-off periods.
2Device complexity
If a gate driver is integrated on the display panel, then device complexity is reduced, but leakage current generation increases especially in high or low temperature environments
Solution Approach 1:
The patent addresses temperature-dependent leakage by dynamically changing voltage parameters. The first control terminal receives different voltage levels depending on whether the transistor should be on or off, and the second control terminal receives complementary signals. This parameter control mechanism effectively suppresses leakage current generation even in high or low temperature environments where leakage naturally increases.
Solution Approach 2:
The second control terminal acts as an intermediary element that receives control signals and modulates the channel conductivity. By introducing this intermediate control mechanism, the patent gains precise control over the thin film transistor operation, enabling effective suppression of leakage current while maintaining the integrated gate driver structure.
3Device complexity
If conventional thin film transistors are used in the gate driver, then device simplicity is maintained, but timing delay occurs in voltage transitions from gate-on to gate-off
Solution Approach 1:
The patent solves timing delay by implementing parameter changes in the control signals. The first control terminal receives voltage transitions (e.g., from first high voltage to first low voltage) that rapidly change the channel conductivity. The second control terminal simultaneously receives complementary voltage changes. This coordinated parameter control enables fast voltage transitions without significant timing delay, improving response speed while keeping the transistor structure relatively simple.
Data Source
AI summary
A display panel includes a gate driver connected to a gate line, where the gate driver includes a plurality of stages, where each of the stages includes at least one dual gate thin film transistor having a first control terminal and a second control terminal, and where each of the stages receives a clock signal, a first low voltage, a second low voltage, at least one transmission signal of previous stages, at least two transmission signals of subsequent stages and an output control signal from one of the stages to output a gate voltage including a gate-on voltage and a gate-off voltage.