Dual-Gate Thin Film Transistor for Leakage Current Reduction
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Solution Overview
Problem
Organic light emitting diode displays face issues with leakage current and reduced breakdown voltage due to increased resistance in thin film transistors, which affect capacitor charging and voltage maintenance during frame time, leading to reduced aperture ratio and data input difficulties.
Innovation Solution
The design incorporates a thin film transistor with a semiconductor layer having a weak electric field region and a second gate electrode configuration that mimics a lightly doped drain (LDD) structure, reducing leakage current and increasing breakdown voltage by forming a strong electric field in the channel region and a weak electric field in the LDD region, thereby enhancing capacitor charging and voltage stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional thin film transistor structure is used, then the device complexity is low, but the leakage current increases and breakdown voltage decreases
Solution Approach 1:
The gate electrode is divided into two separate gate electrodes (first gate electrode and second gate electrode) positioned at different heights. The first gate electrode is in direct contact with the semiconductor layer while the second gate electrode is positioned above it through an insulating layer. This segmentation allows independent control of electric fields in different regions, reducing leakage current by creating a more effective potential barrier while maintaining manageable device complexity through modular construction.
Solution Approach 2:
The invention introduces a vertical dimension to the gate electrode configuration by stacking the first and second gate electrodes at different heights above the semiconductor layer. This three-dimensional arrangement creates overlapping electric fields that extend vertically, enhancing the potential barrier effect without significantly increasing planar device footprint. The dual-layer gate structure effectively adds a vertical control dimension to manage carrier leakage.
2Reliability
If a conventional thin film transistor structure is used, then the manufacturing process is simple, but the breakdown voltage is reduced
Solution Approach 1:
The gate electrode is divided into two separate gate electrodes (first gate electrode and second gate electrode) positioned at different heights. The first gate electrode is in direct contact with the semiconductor layer while the second gate electrode is positioned above it through an insulating layer. This segmentation allows independent control of electric fields in different regions, reducing leakage current by creating a more effective potential barrier while maintaining manageable device complexity through modular construction.
Solution Approach 2:
The invention introduces a vertical dimension to the gate electrode configuration by stacking the first and second gate electrodes at different heights above the semiconductor layer. This three-dimensional arrangement creates overlapping electric fields that extend vertically, enhancing the potential barrier effect without significantly increasing planar device footprint. The dual-layer gate structure effectively adds a vertical control dimension to manage carrier leakage.
3Area of stationary object
If the aperture ratio is increased, then the display area is larger, but the capacitor charging capability is reduced
Solution Approach 1:
The invention changes the electrical parameters of the transistor by implementing the dual-gate configuration, which fundamentally alters the electric field distribution and carrier control characteristics. This parameter change enables the transistor to maintain effective capacitor charging capability even with larger aperture ratios, as the enhanced field control compensates for the reduced transistor area available for charging operations.
4Reliability
If a single gate electrode is used, then the device structure is simple, but the on-current is reduced
Solution Approach 1:
The gate electrode is divided into two separate gate electrodes (first gate electrode and second gate electrode) positioned at different heights. The first gate electrode is in direct contact with the semiconductor layer while the second gate electrode is positioned above it through an insulating layer. This segmentation allows independent control of electric fields in different regions, reducing leakage current by creating a more effective potential barrier while maintaining manageable device complexity through modular construction.
Solution Approach 2:
The first and second gate electrodes are electrically connected through a conductive layer, merging their electrical functions into a unified gate control system. This merging allows the combined structure to generate synergistic electric fields that enhance on-current by simultaneously improving carrier injection and channel control, while the shared electrical connection simplifies the overall control architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces leakage current, increases breakdown voltage, and improves on-current in the channel region, allowing for better capacitor charging and maintaining voltage stability during frame time, thus addressing the limitations of existing thin film transistors in organic light emitting diode displays.
Implementation Method 1
forming a strong electric field in the channel region and a weak electric field in the LDD region
Data Source
AI summary
A thin film transistor includes a substrate, a semiconductor layer on the substrate, a first insulating layer covering the substrate and the semiconductor layer, a first gate electrode on the first insulating layer and overlapping the semiconductor layer, a second insulating layer covering the first gate electrode and the first insulating layer, a second gate electrode on the second insulating layer and overlapping the semiconductor layer and the first gate electrode, a third insulating layer covering the second gate electrode, a first contact hole defined in the first insulating layer, the second insulating layer and the third insulating layer, and through which a portion of the semiconductor layer is exposed, and a source electrode and a drain electrode connected to the semiconductor layer through the first contact hole.