Dual Gate Oxide Semiconductor TFT Substrate Photo Process Reduction
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Solution Overview
Problem
The manufacturing process of dual gate oxide semiconductor TFT substrates for LCDs is complex, requiring multiple photo processes, leading to longer procedures, lower production efficiency, and higher costs.
Innovation Solution
A method utilizing a halftone mask for patterning and ion doping to reduce the number of photo processes, where the oxide conductor layer serves as the pixel electrode, and all source, drain, and top gate components are positioned on the top gate isolation layer, simplifying the structure and reducing the number of photo processes to five.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the conventional dual gate oxide semiconductor TFT substrate structure is manufactured with separate photo processes for each layer, then the manufacturing precision and reliability are improved, but the device complexity and production cost increase
Solution Approach 1:
The patent combines multiple photo processes into a single integrated photo process. Specifically, the pixel electrode pattern, source/drain electrode pattern, and top gate pattern are formed simultaneously in one photo process step, rather than using separate photo processes for each layer. This merging approach maintains patterning precision while significantly reducing process complexity and production cost.
Solution Approach 2:
The single photo process serves multiple functions: it patterns the pixel electrode, source/drain electrodes, and top gate simultaneously. This multi-functional approach eliminates the need for multiple dedicated photo processes, reducing the overall number of manufacturing steps while maintaining the required precision for each component.
2Manufacturing precision
If multiple photo processes are used for each layer patterning, then the manufacturing precision is improved, but the production efficiency decreases and manufacturing time increases
Solution Approach 1:
Multiple photo processes are merged into a single integrated photo process that patterns all conductive layers (pixel electrode, source/drain electrodes, and top gate) simultaneously. This reduces the total number of photo process steps from multiple sequential processes to one, significantly improving production efficiency while maintaining patterning precision through optimized mask design and exposure parameters.
Solution Approach 2:
The patent performs preliminary patterning of all conductive layers in advance during the same photo process step, rather than patterning each layer sequentially. This preliminary action approach allows all critical patterns to be established in one operation, reducing total manufacturing time and improving productivity without sacrificing precision.
3Manufacturing precision
If multiple photo processes are implemented for each structure layer, then the manufacturing precision is maintained, but the loss of time and production cost increase
Solution Approach 1:
The patent merges multiple sequential photo processes into a single integrated photo process that patterns the pixel electrode, source/drain electrodes, and top gate simultaneously. This eliminates the time required for multiple separate photo process cycles, reducing the manufacturing cycle time while maintaining patterning precision through optimized single-step exposure and development parameters.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach shortens the manufacturing procedure, increases production efficiency, and lowers production costs by integrating multiple steps into fewer photo processes while maintaining superior performance characteristics of dual gate TFTs.
Implementation Method 1
employing a halftone mask to implement a second photo process: first, implementing exposure, development to the photoresist layer
Implementation Method 2
employing the first photoresist layer and the second photoresist layer to implement etching the oxide semiconductor layer... to transform the two side areas of the first oxide semiconductor layer to be a conductor
Data Source
AI summary
The present invention provides a manufacture method of an oxide semiconductor TFT substrate and a structure thereof. The manufacture method of the dual gate oxide semiconductor TFT substrate utilizes the halftone mask to implement one photo process, which cannot only accomplish the patterning to the oxide semiconductor layer but also obtain the oxide conductor layer (52′) with ion doping process, and the oxide conductor layer (52′) is employed as being the pixel electrode of the LCD to replace the ITO pixel electrode in prior art; the method manufactures the source (81), the drain (82) and the top gate (71) at the same time with one photo process; the method implements patterning process to the passivation layer (8) and the top gate isolation layer (32) together with one photo process, to reduce the number of the photo processes to five for shortening the manufacture procedure, raising the production efficiency and lowering the production cost.