Dual-Gate Thin Film Transistor With Segmented Insulation
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Solution Overview
Problem
Conventional dual-gate thin film transistors fail to operate normally when a partial insulation defect occurs, leading to pixel defects in flat panel display devices, resulting in reduced yield and increased manufacturing costs.
Innovation Solution
A thin film transistor design with a substrate, semiconductor layer, first and second gate electrodes, a gate insulating layer with through holes, and a conductive capping layer that contacts the semiconductor layer, allowing the transistor to function even with a short between the gate electrodes and the semiconductor layer, and includes a method for manufacturing this structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional dual-gate thin film transistor is used, then the transistor structure is simple and manufacturing is easy, but the transistor fails to operate normally when insulation defects occur between gate electrodes and semiconductor layer
Solution Approach 1:
The gate insulating layer is divided into multiple regions with different thicknesses: a first region with greater thickness between gate electrodes and semiconductor layer, and a second region with lesser thickness between gate electrodes and capping layer. This segmentation allows the structure to tolerate insulation defects in the first region while maintaining functionality through the second region.
Solution Approach 2:
The patent designs the gate insulating layer with a first region of greater thickness as a protective cushion between the gate electrodes and semiconductor layer. This pre-designed thicker insulation region compensates for potential insulation defects, ensuring that even if defects occur, the transistor can still operate normally through the second region's insulation.
2Productivity
If conventional dual-gate thin film transistors are manufactured, then manufacturing processes are simple, but yield is reduced due to pixel defects from insulation failures
Solution Approach 1:
The gate insulating layer exhibits local quality variation with different thicknesses in different regions. The first region has greater thickness for enhanced insulation reliability, while the second region has lesser thickness. This local differentiation improves yield by preventing pixel defects in critical areas without unnecessarily complicating the overall manufacturing process.
3Reliability
If conventional dual-gate thin film transistors are used, then manufacturing costs are lower, but costs increase due to reduced yield from insulation defects
Solution Approach 1:
The patent changes the thickness parameter of the gate insulating layer spatially, creating regions of different thicknesses. This parameter variation improves transistor reliability by ensuring adequate insulation in critical regions while maintaining manufacturing feasibility and controlling costs through a relatively simple multi-layer structure.
Data Source
AI summary
A thin film transistor includes: a substrate, a semiconductor layer disposed on the substrate, a first gate electrode and a second gate electrode disposed on the semiconductor layer, a gate insulating layer disposed between the semiconductor layer and the first and second gate electrodes and having a first through hole between the first and second gate electrodes and a capping layer covering the first gate electrode and contacting the semiconductor layer via the first through hole. The capping layer includes a conductive material.