Dual-Gate TFT With Side-Connected Gate Electrodes
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Solution Overview
Problem
The formation of a dual-gate structure in thin film transistors (TFTs) for OLED display devices results in spatial loss and requires additional processes to create undoped or low concentration regions, hindering high resolution and increasing production costs.
Innovation Solution
A TFT design featuring a gate electrode with separated gate regions connected by a gate connection electrode, eliminating the need for additional processes to form undoped or low concentration regions, and allowing for excellent driving margins without spatial loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a dual-gate structure is formed in TFT, then driving margin is improved, but spatial loss increases and manufacturing complexity increases
Solution Approach 1:
The gate connection electrode is positioned at the side of the gate electrode rather than underneath, utilizing the lateral dimension instead of the vertical stacking dimension. This side-connection approach eliminates the need for additional vertical space that would be required for traditional under-gate connections, thereby reducing spatial loss while maintaining the dual-gate structure's driving margin benefits.
2Reliability
If a dual-gate structure is formed in TFT, then driving margin is improved, but device complexity increases
Solution Approach 1:
The gate connection electrode is integrated with the source or drain electrode structure, forming a unified conductive element. This merging eliminates the need for separate gate connection processes and reduces the number of distinct manufacturing steps required for dual-gate TFT fabrication, thereby simplifying the overall manufacturing process while preserving the dual-gate configuration's performance advantages.
3Reliability
If additional processes are used to form undoped or low concentration regions, then driving margin is secured, but productivity decreases and manufacturing cost increases
Solution Approach 1:
The gate electrode structure is designed with built-in separation regions that inherently create undoped or low concentration regions in the active layer during the standard doping process. This preliminary structural design eliminates the need for subsequent additional doping processes or mask steps, thereby maintaining driving margin requirements while improving productivity by reducing the total number of manufacturing steps.
Data Source
AI summary
A thin film transistor (TFT) comprises: an active layer formed on a substrate; a gate insulating layer formed on the active layer; a gate electrode including a first gate region and a second gate region formed on portions of the gate insulating layer and spaced apart with a separation region interposed therebetween; an interlayer insulating layer formed on the gate insulating layer and the gate electrode, and having an opening formed to expose portions of the gate insulating layer and the gate electrode around the separation region; a gate connection electrode formed on the interlayer insulating layer and connected to the first gate region and the second gate region through the opening; and source and drain electrodes formed on the interlayer insulating layer. The TFT and the OLED display device have excellent driving margin without a spatial loss.