Radiation-Hardened Dual Gate Transistor with JFET Control

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Solution Overview

Problem

MOSFETs are prone to functional failure due to total ionizing dose (TID) effects, which cause trapped charge in the gate oxide, leading to shifts in the gate threshold voltage, and existing solutions either increase susceptibility to single-event gate rupture or are costly and complex, while dual-gate MOSFET implementations do not adequately address radiation effects.

Innovation Solution

A radiation-hardened dual gate semiconductor transistor device is developed, integrating a MOSFET gate and a JFET gate within a monolithic structure, where the JFET gate can independently control current flow even after the MOS gate becomes non-functional due to TID-induced threshold voltage shifts, using a lens-shaped gate oxide and guard rings to mitigate leakage and enhance radiation hardness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If MOSFET gate oxide thickness is decreased to reduce TID-induced threshold voltage shift, then radiation hardness against TID is improved, but susceptibility to single-event gate rupture increases

Engineering Contradiction:
Improveradiation hardness against TIDVSAvoidsusceptibility to single-event gate rupture
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent combines MOSFET and JFET structures into a single integrated device, merging the radiation sensitivity of MOSFET with the radiation hardness of JFET to create a hybrid device that achieves both TID hardness and SEGR resistance

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The device uses a composite gate structure combining MOS gate and JFET gate regions, leveraging the complementary radiation hardness properties of both transistor types to resolve the contradiction between TID hardness and SEGR resistance

Inventive Principle:
Principle #40Composite materials

2Reliability

If MOSFET gate oxide thickness is decreased to reduce trapped charge, then TID-induced threshold voltage shift is reduced, but gate capacitance increases

Engineering Contradiction:
Improvethreshold voltage stability under TIDVSAvoidgate capacitance
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The hybrid MOSFET-JFET structure combines the low capacitance advantage of JFET with the high-speed switching of MOSFET, achieving both threshold voltage stability and low gate capacitance

Inventive Principle:
Principle #5Merging (Combining)

3Ease of operation

If traditional dual-gate MOSFET is used to control current flow, then device functionality is achieved, but radiation effects are not adequately addressed

Engineering Contradiction:
Improvecurrent flow controlVSAvoidradiation hardness
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The device segments the gate control into two independent regions: MOS gate for high-speed switching and JFET gate for radiation-hardened current control, allowing each segment to optimize for its specific function

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The device enables dynamic switching between MOSFET and JFET operation modes, allowing the system to adapt to radiation conditions by activating the appropriate gate control mechanism

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The dual gate structure effectively prevents TID-induced functional failure by allowing the JFET gate to control current flow, enhancing radiation hardness and operational reliability in TID environments, while also reducing costs and complexity compared to traditional dual-gate implementations.

Implementation Method 1

a monolithic junction field effect transistor (JFET) section disposed into the first substrate... such that when the JFET is operated, the electrical field can decouple the semi-conductive channel of the MOSFET structure

Methodology Applied
Scientific EffectElectrical field effect: Electric Field

Implementation Method 2

using a lens-shaped gate oxide and guard rings to mitigate leakage and enhance radiation hardness

Methodology Applied
Scientific EffectElectric field shaping: Electric Field

Data Source

PatentUS9590611B2Radiation-hardened dual gate semiconductor transistor devices containing various improved structures including MOSFET gate and JFET gate structures and related methods
Publication Date: 2017.03.07 THE UNITED STATES OF AMERICA AS REPRESENTED BY THE SECRETARY OF THE NAVY
  • US9590611B2 patent drawing
  • US9590611B2 patent drawing
  • US9590611B2 patent drawing

AI summary

Systems and methods for controlling current or mitigating electromagnetic or radiation interference effects using structures configured to cooperatively control a common semi-conductive channel region (SCR). One embodiment includes providing a metal oxide semiconductor field effect transistor (MOSFET) section formed with an exemplary SCR and two junction field effect transistor (JFET) gates on opposing sides of the MOSFET's SCR such that operation of the JFET modulates or controls current through the MOSFET's. With two JFET gate terminals to modulate various embodiments' signal(s), an improved mixer, demodulator, and gain control element in, e.g., analog circuits can be realized. Additionally, a direct current (DC)-biased terminal of one embodiment decreases cross-talk with other devices. A lens structure can also be incorporated into MOSFET structures to further adjust operation of the MOSFET. An embodiment can also include a current leakage mitigation structure configured to reduce or eliminate current leakage between MOSFET and JFET structures.