Dual-Gate Transistor Trench Patterning for Low On-Resistance
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Solution Overview
Problem
Power transistors in automotive and industrial electronics require a balance between low on-state resistance (Ron·A) and high voltage blocking capability, which existing designs struggle to achieve effectively.
Innovation Solution
A semiconductor device with a dual-gate transistor structure, featuring first and second gate electrodes disconnected from each other, and body regions patterned into ridges by trenches, reducing Ron·A while maintaining high voltage blocking capability through optimized doping and trench arrangements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional single-gate transistor structure is used, then the device complexity is low, but the on-state resistance cannot be sufficiently reduced while maintaining high voltage blocking capability
Solution Approach 1:
The transistor is divided into two separate gate-controlled regions (first gate electrode controlling first portion of body region, second gate electrode controlling second portion of body region). Each gate electrode is independently controllable and is arranged in separate trenches, allowing independent optimization of different regions to simultaneously achieve low on-state resistance and high voltage blocking capability
Solution Approach 2:
The patent transitions from a planar single-gate structure to a three-dimensional dual-gate structure with gates arranged in trenches at different spatial positions. The first and second gate electrodes are positioned in different trenches that pattern different portions of the body region, creating a vertical and lateral dimensional arrangement that enables independent control of channel regions
2Reliability
If the body region is fully depleted to suppress parasitic bipolar transistors, then the voltage blocking capability is improved, but the on-state resistance increases
Solution Approach 1:
Different regions of the body are given different doping characteristics and gate control. The first portion of the body region adjacent to the first gate electrode has optimized doping for low resistance, while the second portion adjacent to the second gate electrode is optimized for voltage blocking. This local differentiation allows each region to perform its specific function optimally without compromising the other
Solution Approach 2:
The patent employs different doping concentrations and types in different portions of the body region. By adjusting doping parameters (concentration, type, distribution) in the first and second portions separately, the device achieves full depletion for parasitic suppression while maintaining low on-state resistance through optimized carrier concentration in the channel regions
3Reliability
If a dual-gate transistor structure with disconnected gate electrodes is implemented, then the on-state resistance is reduced and voltage blocking capability is enhanced, but the device complexity and manufacturing difficulty increase
Solution Approach 1:
The manufacturing process is segmented into separate steps for forming first trenches and second trenches, with first gate electrodes and second gate electrodes fabricated independently. This segmentation allows each component to be optimized and controlled separately during manufacturing, reducing the complexity of simultaneous multi-parameter control
Solution Approach 2:
The trenches are pre-patterned and gate electrodes are pre-formed in specific positions before final device assembly. The first and second trenches are created at defined locations, and gate electrodes are deposited and shaped in advance, allowing subsequent steps to build upon these prepared structures rather than requiring complex simultaneous formation
Data Source
AI summary
A semiconductor device includes a transistor. The transistor includes a source region and a drain region disposed adjacent to a first main surface of a semiconductor substrate, a first gate electrode and a second gate electrode, the first gate electrode being disconnected from the second gate electrode. The transistor further includes a body region. The first gate electrode is adjacent to a first portion of the body region and the second gate electrode is adjacent to a second portion of the body region. The transistor further includes first trenches patterning the first portion of the body region into a first ridge, and second trenches patterning the second portion of the body region into a second ridge. The first gate electrode is arranged in at least one of first trenches, and the second gate electrode is arranged in at least one of the second trenches.