Dual-Gate Transistor Turn-Off Circuit for Lower Switching Loss
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Solution Overview
Problem
Dual gate transistor arrangements, such as IGBTs, require complex control methods due to two gate electrodes, increasing system complexity and energy losses during switching.
Innovation Solution
A circuit and method for controlling dual gate transistors by decoupling gate nodes sequentially using predefined time periods to reduce energy losses, allowing for simpler control and reduced complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If two gate electrodes are used in dual gate transistor arrangement, then turn-off energy losses are reduced and switching speed is improved, but system complexity increases due to requiring dual-channel gate drivers and separate control of each gate
Solution Approach 1:
The patent combines the control of both gate electrodes into a single gate driver by electrically connecting the two gates in parallel. This merging approach allows one gate driver to control both gates simultaneously, reducing the required number of gate drivers from two to one, thereby decreasing system complexity while preserving the turn-off energy reduction benefit
Solution Approach 2:
The single gate driver is designed to perform the function of controlling both gate electrodes, making it a multi-functional device. This universal gate driver can drive multiple gates with a single output, eliminating the need for separate dedicated drivers for each gate and simplifying the overall control architecture
2Productivity
If two gate electrodes are used in dual gate transistor arrangement, then low saturation voltages and fast switching are achieved, but additional control effort is required including gate drivers with two outputs and corresponding control methods
Solution Approach 1:
The control signals for both gates are merged into a single control output. By connecting the gates in parallel and using one gate driver, the control effort is reduced from managing two separate control channels to managing a single control channel, simplifying the control methodology while maintaining fast switching performance
3Device complexity
If conventional single gate transistor is used, then control system is simpler with single gate driver, but trade-off between conduction losses and turn-off energies is necessary
Solution Approach 1:
The patent segments the control function by introducing a dual gate structure where each gate can be controlled independently or together. This segmentation allows the transistor to achieve low conduction losses when both gates are on, while enabling selective turn-off sequencing to reduce turn-off energy losses, all managed through a simplified single-driver architecture
Data Source
AI summary
A circuit includes an input node configured to receive a gate control signal for controlling a dual gate transistor arrangement, a first output node configured to be coupled to a first gate node of the dual gate transistor arrangement, a first switch coupled between the input node and the first output node, and a second output node configured to be coupled to a second gate node of the dual gate transistor arrangement and coupled to the input node. A control circuit is configured to, upon detecting that the gate control signal indicates a turn-off of the dual gate transistor arrangement, open the first switch for a first predefined time period, and close the first switch after the first predefined time period.