Dual-Gated Charge Storage for Image Sensors
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Solution Overview
Problem
Conventional MOS-type photogate structures in image sensor devices suffer from light absorption losses, increased resistance due to thick poly-silicon, and noise from dark current at the Si-SiO2 boundary, requiring high operating voltages.
Innovation Solution
A dual-gated charge storage region within a substrate, featuring first and second diodes with respective conductivity type regions and transfer transistors, which receive light and store photocharges efficiently, reducing noise and operating voltage requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If poly-silicon thickness is increased to reduce resistance, then voltage transfer improves, but light absorption loss increases
Solution Approach 1:
The patent divides the photogate structure into two separate gates (first photogate and second photogate) with different material compositions. The first photogate uses a high-k dielectric material while the second photogate uses a different high-k dielectric material, allowing each gate to be optimized independently for its specific function, thus resolving the contradiction between voltage transfer stability and light absorption loss.
Solution Approach 2:
The patent changes the material parameters by introducing high-k dielectric materials with different dielectric constants for the two photogates. This parameter change allows the first photogate to have strong voltage transfer capability while the second photogate has reduced light absorption, thereby resolving the technical contradiction.
2Productivity
If MOS-type photogate structure is used, then photocharge collection efficiency is controlled, but noise from dark current increases due to concentration at Si-SiO2 boundary
Solution Approach 1:
The patent extracts the photocharge storage function from the traditional MOS-type photogate structure by introducing a separate full-well region. This separation removes the harmful effect of dark current concentration at the Si-SiO2 boundary while preserving the photocharge collection efficiency, as photocharges are stored in the full-well region away from the problematic interface.
Solution Approach 2:
The patent introduces a vertical dimension by creating a deep full-well region beneath the photogate structure. This dimensional change allows photocharges to be stored in a separate spatial region away from the Si-SiO2 boundary, thereby eliminating dark current noise while maintaining collection efficiency.
3Productivity
If MOS-type photogate structure is used, then photocharge collection is controlled, but high operating voltage of 3.3V or higher is required
Solution Approach 1:
The patent changes the dielectric parameter by using high-k dielectric materials with higher dielectric constants than traditional SiO2. This parameter change increases the capacitance of the photogate structure, allowing for effective photocharge collection and control at lower operating voltages, thereby reducing the energy requirement from 3.3V or higher to lower voltage levels.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances light use efficiency, minimizes noise from dark current, and allows for low-voltage operation by storing photocharges in wells away from the Si-SiO2 boundary, improving overall image sensor performance.
Implementation Method 1
a common charge generating region, configured to receive light incident on a surface of the image sensor device
Data Source
AI summary
An image sensor device may include a dual-gated charge storage region within a substrate. The dual-gated charge storage region includes first and second diodes within a common charge generating region. This charge generating region is configured to receive light incident on a surface of the image sensor device. The first and second diodes include respective first conductivity type regions responsive to first and second gate signals, respectively. These first and second gate signals are active during non-overlapping time intervals.