Dual Heater Non-Volatile Memory Reset Current Reduction

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Solution Overview

Problem

Non-volatile memory devices, such as phase-change random access memories (PRAMs), face challenges in reducing reset current, which affects their efficiency and performance.

Innovation Solution

A non-volatile memory device design featuring a data storage structure with a conductive lower heater element and a conductive upper heater element stacked sequentially, where the sidewall surfaces of the data storage pattern are coplanar with the heater elements, and a contact area between the heater elements and the data storage pattern is optimized to minimize reset current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If a traditional single heater configuration is used, then the device structure is simple, but the reset current is high

Engineering Contradiction:
Improvereset currentVSAvoidheater configuration
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The heater is divided into two separate heater elements (first heater and second heater) that are positioned on opposite sides of the data storage pattern. This segmentation allows each heater to contribute to heating the data storage pattern from different directions, improving heating efficiency and reducing the reset current required, while accepting increased structural complexity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The heater configuration transitions from a single-plane heater to a three-dimensional arrangement with heaters positioned on both top and bottom sides of the data storage pattern. This dimensional change enables more uniform and efficient heat distribution, reducing the overall energy required for reset operations

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Temperature

If the contact area between heater and data storage pattern is increased, then heat transmission is improved, but the device area increases

Engineering Contradiction:
Improveheat transmissionVSAvoiddevice area
Core Design Contradiction:
TemperatureVSArea of stationary object

Solution Approach 1:

The heater elements are designed with specific contact areas that are optimized to maximize heat transmission efficiency to the data storage pattern. The contact areas are positioned precisely where needed (at the interfaces between heaters and data storage pattern) rather than uniformly distributed, achieving effective heat transmission without excessive device area

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

Heat transmission is enhanced by utilizing three-dimensional heat paths from both top and bottom heaters simultaneously, rather than relying on a single large contact area. This allows effective heat transmission through vertically stacked components, reducing the lateral device area required

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design achieves a low reset current, enhancing the electrical properties and efficiency of the memory device by improving heat emission and transmission characteristics, leading to improved performance compared to traditional heater arrangements.

Implementation Method 1

a conductive lower heater element, a data storage pattern, and a conductive upper heater element sequentially stacked

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS9196827B2Non-volatile memory devices having dual heater configurations and methods of fabricating the same
Publication Date: 2015.11.24 SAMSUNG ELECTRONICS CO LTD
  • US9196827B2 patent drawing
  • US9196827B2 patent drawing
  • US9196827B2 patent drawing

AI summary

A non-volatile memory device includes a data storage structure coupled between first and second conductive lines of the memory device. The data storage structure includes a conductive lower heater element, a data storage pattern, and a conductive upper heater element sequentially stacked. At least one sidewall surface of the data storage pattern is coplanar with a sidewall surface of the upper heater element thereabove and a sidewall surface of the lower heater element therebelow. Related fabrication methods are also discussed.