Dual Index DMA Bit-Plane Creation for Memory Bandwidth Bottlenecks
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Solution Overview
Problem
Existing image display systems, particularly those using digital micromirror devices, face inefficiencies in converting frame data into bit-plane format, leading to poor memory bandwidth utilization and the inability to process multiple bit-planes simultaneously, as they require reading and extracting data N times for each bit-plane, resulting in a memory bandwidth bottleneck.
Innovation Solution
The method employs dual index direct memory access operations to create bit-planes from frame data, allowing for the formation of data elements comprising bits of equal significance, thereby enabling efficient corner turning and reducing the number of instructions required, which allows for optimized memory and logic usage on digital signal processors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If traditional corner turning methods are used to convert frame data to bit-plane format, then the conversion can be performed, but memory bandwidth is poorly utilized and the process reads N times as much data as actually used
Solution Approach 1:
The patent segments the frame data into multiple bit-planes, where each bit-plane contains bits of equal significance from all pixel data elements. This segmentation allows the system to process and transfer only the necessary data for each bit-plane independently, improving memory bandwidth utilization by avoiding redundant reads of the entire frame data for each bit-plane extraction.
Solution Approach 2:
The patent performs preliminary action by using dual index direct memory access operations to extract and organize bits of equal significance into separate bit-plane data structures before the actual processing. This preliminary organization of data into bit-planes enables efficient downstream processing and reduces the need for repeated data reads, thereby improving both memory bandwidth utilization and data extraction efficiency.
2Productivity
If traditional solutions process bit-planes sequentially one at a time, then the conversion is simple to implement, but the number of instructions required increases and memory bandwidth is bottlenecked
Solution Approach 1:
The patent merges multiple bit-plane processing operations into a single dual index direct memory access operation. Instead of processing bit-planes sequentially with multiple separate instructions, the system uses one memory access operation to retrieve frame data and simultaneously organize it into multiple bit-planes, thereby increasing processing throughput while reducing the total number of instructions required.
Solution Approach 2:
The patent introduces a new dimension to data processing by using dual index addressing, which allows simultaneous access to different parts of the frame data based on bit significance. This dimensional change in data organization enables parallel extraction of multiple bit-planes in a single operation, improving throughput without proportionally increasing instruction complexity.
3Loss of information
If the entire data set is read for each bit position extraction, then complete data is available, but memory bandwidth is wasted reading unnecessary data
Solution Approach 1:
The patent extracts only the necessary bits of equal significance from the frame data into separate bit-plane structures. By using dual index direct memory access, the system extracts only the required data portions rather than reading the entire data set for each extraction, thereby maintaining data completeness for the relevant bits while significantly reducing memory bandwidth consumption on unnecessary data transfers.
Data Source
AI summary
According to one embodiment of the present invention, a method for creating bit planes from frame data for a digital mirror device is disclosed including forming data elements comprising bits of equal significance from a plurality of pixel data in the frame data, the forming including using dual index direct memory address operations.