Dual Input LDO Regulator for Power Sequencing
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Solution Overview
Problem
Conventional low-dropout (LDO) regulators in complex electronic systems, such as those with FPGAs, face a sequencing issue where the core logic circuitry receives power after the I/O circuitry due to the efficient but slower switching regulators, necessitating an alternative approach to ensure proper power sequencing without using multiple discrete components.
Innovation Solution
A dual input linear regulator structure with internal priority logic that allows the LDO circuit to generate a regulated output voltage using either an unregulated or regulated supply voltage, ensuring the core logic receives power before the switching regulator is operational, and switching to the more efficient regulator once the regulated voltage is sufficient.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a conventional LDO regulator is used with a switching regulator in series arrangement, then energy efficiency is improved, but the startup sequencing is worsened (core voltage lags behind I/O voltage)
Solution Approach 1:
The LDO regulator is segmented into two independent regulator circuits: a first regulator circuit that operates during startup from the unregulated voltage, and a second regulator circuit that operates during normal operation from the regulated voltage. This segmentation allows each circuit to be optimized for its specific operational phase, resolving the contradiction between efficient operation and proper sequencing.
Solution Approach 2:
The regulator dynamically switches between two input voltage sources based on operational conditions. A priority logic circuit monitors the availability of regulated voltage and automatically selects the appropriate input source, enabling the system to adapt its power supply configuration in real-time to meet both efficiency and sequencing requirements.
2Loss of time
If a LDO regulator is driven by unregulated voltage during startup, then startup sequencing is improved, but energy efficiency and heat generation are worsened
Solution Approach 1:
The system dynamically transitions from using the first regulator circuit during startup to using the second regulator circuit during normal operation. This dynamic switching ensures that the less efficient circuit (first regulator) operates only when necessary for startup sequencing, minimizing energy waste while maintaining proper power sequencing.
Solution Approach 2:
The first regulator circuit performs preliminary action during startup by generating the core voltage before the switching regulator is fully operational. Once this preliminary function is complete, the system transitions to the more efficient second regulator circuit, eliminating the need for continuous operation of the less efficient circuit.
3Loss of time
If discrete diodes and multiple regulators are used to achieve proper sequencing, then sequencing control is improved, but device complexity and cost are worsened
Solution Approach 1:
Two separate regulator circuits that could have been implemented as discrete components are merged into a single integrated LDO regulator device. The priority logic circuit that manages switching between circuits is also integrated, reducing overall system complexity while maintaining the ability to control power sequencing properly.
Solution Approach 2:
The LDO regulator is designed with multi-functionality, serving both as a startup regulator and a normal operation regulator through its two internal circuits. This universal design eliminates the need for separate discrete regulators and sequencing control components, reducing device complexity while achieving proper power sequencing.
Data Source
AI summary
An LDO regulator includes two linear regulator circuits and an internal priority logic scheme that favors generating a regulated output voltage using a regulated supply voltage over an unregulated supply voltage. The unregulated supply voltage is applied to a first input terminal from a raw voltage source. The regulated supply voltage is applied to a second input terminal from, for example, a switching (e.g., BUCK) regulator. Two output devices are respectively connected between the first and second input terminals and the LDO output terminal. The first regulator circuit causes the first output device to supply the desired regulated output voltage while the switching regulator ramps up. Once the regulated supply voltage is high enough to allow regulation, the internal priority logic scheme disables the first regulator circuit, whereby the desired regulated output voltage is generated solely by the second regulator circuit through the second output device.