Dual-Interface Persistent Storage With Protocol-Partitioned Cache

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Solution Overview

Problem

Existing persistent storage devices struggle to efficiently manage different data protocols with varying data payload sizes and granularities, leading to suboptimal performance and resource utilization.

Innovation Solution

A persistent storage device with a dual interface that employs a cache partitioned into regions for different protocols (e.g., NVMe and CXL) and storage media (e.g., single-level and triple-level cells) to prioritize caching and storage based on protocol-specific characteristics, optimizing cache usage and media selection for improved performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single cache is used for multiple protocols with different data payload sizes, then device complexity is reduced, but performance is suboptimal due to inability to prioritize caching for smaller payload sizes

Engineering Contradiction:
Improvecache structureVSAvoidI/O performance
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The cache is divided into multiple regions, with each region dedicated to handling specific protocols or data payload sizes. This segmentation allows the system to optimize caching strategies for different protocol requirements (e.g., NVMe vs. CXL) without increasing overall device complexity, as the partitioning is managed through protocol-specific interface circuits that route data to appropriate cache regions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different cache regions are allocated with different characteristics and policies tailored to specific protocol requirements. Smaller payload sizes from protocols like CXL can be directed to cache regions optimized for low-latency access, while larger payloads from NVMe can use regions optimized for throughput, thereby improving overall I/O performance through localized optimization.

Inventive Principle:
Principle #3Local quality

2Loss of time

If faster storage media is used for all data, then I/O latency is reduced, but resource efficiency decreases due to inability to optimize media selection for different payload sizes

Engineering Contradiction:
ImproveI/O latencyVSAvoidresource efficiency
Core Design Contradiction:
Loss of timeVSUse of energy by moving object

Solution Approach 1:

The system dynamically changes storage media selection based on data payload characteristics. For smaller payload sizes, faster storage media (e.g., SLC NAND) is selected to minimize latency, while for larger payload sizes, slower but more energy-efficient media (e.g., TLC or QLC NAND) is used. This parameter-based selection optimizes the balance between I/O latency and resource efficiency.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The storage media assignment is dynamic rather than static, allowing the system to adapt media selection based on real-time requirements of incoming I/O requests. The interface circuits analyze payload characteristics and dynamically route data to appropriate storage media, enabling the system to respond optimally to varying workloads.

Inventive Principle:
Principle #15Dynamics

3Productivity

If protocol-specific cache regions are implemented, then cache usage is optimized for different protocols, but device complexity increases

Engineering Contradiction:
Improvecache utilization efficiencyVSAvoidcache management structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The cache management system is designed with multi-functionality to handle multiple protocols through a unified control architecture. The interface circuits are configured to recognize different protocols (NVMe, CXL, etc.) and automatically route data to appropriate cache regions, providing protocol-specific optimization without requiring separate management systems for each protocol, thereby limiting the increase in device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP4357927B1Persistent storage with dual interface
Publication Date: 2026.03.11 SAMSUNG ELECTRONICS CO LTD
  • EP4357927B1 patent drawingFigure 1A
  • EP4357927B1 patent drawingFigure 1B~1C
  • EP4357927B1 patent drawingFigure 2A~2F

AI summary

Systems and methods for persistent storage with a dual interface. In some embodiments, a persistent storage device includes: a processing circuit; a cache; and persistent storage. The processing circuit may be configured to perform a method, the method including: receiving a first write request according to a first protocol; saving a data payload of the first write request in a first portion of the cache; receiving a second write request according to a second protocol; and saving a data payload of the second write request in a second portion of the cache.