Dual-Interface Memory Subsystem for Faster Boot Without S-NOR

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Embedded computing systems with SSD memory subsystems face longer boot times and increased manufacturing costs due to the need for a separate S-NOR component for booting, which is unnecessary in upgradable SOC products.

Innovation Solution

A dual interface memory subsystem is introduced, logically dividing the NVM into a boot partition and a user partition, with a serial interface for quick access to the primary boot loader before high-speed interface initialization, eliminating the need for a separate S-NOR component.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a separate S-NOR component is used for booting, then the system can reliably execute the primary boot loader, but the manufacturing cost increases and the device complexity increases

Engineering Contradiction:
Improveboot loader execution reliabilityVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent merges the S-NOR flash memory functionality into the existing NVM component. The NVM is logically divided into a boot partition and a user partition, with the boot partition storing the primary boot loader. This integration eliminates the need for a separate S-NOR component, reducing manufacturing cost and device complexity while maintaining the ability to reliably execute the boot loader during system initialization.

Inventive Principle:
Principle #5Merging (Combining)

2Speed

If a separate S-NOR component is used for booting, then the primary boot loader can be quickly accessed, but the device complexity increases

Engineering Contradiction:
Improveboot loader access speedVSAvoidcomponent quantity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent combines the boot storage function into the NVM by creating a boot partition within the NVM's address space. The NVM controller manages this partition and can quickly transfer the primary boot loader to the host system's memory during boot initialization. This approach maintains fast boot loader access while reducing device complexity by eliminating separate S-NOR hardware.

Inventive Principle:
Principle #5Merging (Combining)

3Ease of manufacture

If the NVM is used for both boot and user data, then the manufacturing cost is reduced, but the manufacturing precision requirements increase

Engineering Contradiction:
Improvemanufacturing costVSAvoidpartition management precision
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent segments the NVM into distinct logical partitions: a boot partition for storing the primary boot loader and a user partition for storing user data and second-stage boot loaders. The NVM controller implements precise partition management, allocating specific address ranges to each partition. This segmentation allows the system to use a single NVM component for multiple purposes while maintaining the precision needed for reliable boot operations and user data storage.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12596668B2Dual interface high-speed memory subsystem
Publication Date: 2026.04.07 MICRON TECHNOLOGY INC
  • US12596668B2 patent drawing
  • US12596668B2 patent drawing
  • US12596668B2 patent drawing

AI summary

A memory subsystem that includes a memory device, a first host interface, a serial interface controller that provides host access to a boot partition of the memory device using the first host interface, a second host interface, and a high-speed interface controller that provides host access to a user partition of the memory device using the second host interface.