Dual Internal Voltage Generator for Semiconductor IC Power Management
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Miniaturization of semiconductor integrated circuits leads to dielectric breakdown when using conventional 5-volt external supply voltage, necessitating voltage down-conversion to maintain reliable internal voltages and reduce power consumption.
Innovation Solution
A semiconductor integrated circuit design incorporating dual internal voltage generators, one using PMOS and the other NMOS, with a power control circuit to switch between them based on driving voltages, enabling efficient generation and regulation of internal voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional 5-volt external supply voltage is used, then power consumption is high, but dielectric breakdown occurs reducing reliability
Solution Approach 1:
The voltage generation function is segmented into two separate circuits: a PMOS-based voltage generator for power-on initialization and an NMOS-based voltage generator for steady-state operation. This segmentation allows each circuit to be optimized for its specific operational phase, enabling reliable voltage generation while controlling power consumption throughout the device lifecycle
Solution Approach 2:
The invention dynamically switches between PMOS and NMOS voltage generators based on operational state. During power-on, the PMOS generator is enabled to provide stable initialization. After power-on completion, the system transitions to the NMOS generator which offers superior power efficiency. This dynamic switching resolves the contradiction by adapting the voltage generation mechanism to operational requirements
2Use of energy by moving object
If voltage down-conversion is implemented to reduce power consumption, then power consumption decreases, but circuit complexity increases
Solution Approach 1:
The voltage down-conversion functionality is segmented into two specialized generators rather than using a single complex regulator. The PMOS-based generator handles power-on initialization with simple comparator control, while the NMOS-based generator handles steady-state operation with enhanced power efficiency. This segmentation reduces overall complexity by assigning specific functions to simpler dedicated circuits
Solution Approach 2:
Each voltage generator incorporates self-regulating mechanisms through comparator feedback loops that automatically adjust output voltage to match reference levels. The PMOS generator self-regulates during power-on, and the NMOS generator self-regulates during steady-state operation, eliminating the need for external complex control circuitry and reducing overall system complexity
3Reliability
If internal voltage generator is provided to ensure reliability, then circuit reliability improves, but power consumption increases
Solution Approach 1:
The invention implements dynamic power management by switching between PMOS and NMOS voltage generators based on operational state. During power-on, the PMOS generator ensures reliable initialization. After power-on completion, the system transitions to the NMOS generator which provides equivalent voltage stability with significantly lower power consumption due to NMOS transistors' lower leakage current and higher efficiency in steady-state operation
Solution Approach 2:
The invention changes the operational parameters of the voltage generation system by selecting different transistor types (PMOS vs NMOS) based on operational phase. NMOS transistors exhibit lower off-state leakage and higher efficiency during steady-state operation, allowing the system to maintain reliable voltage generation while minimizing power consumption during the extended steady-state period
Data Source
AI summary
A semiconductor integrated circuit includes a first internal voltage generator including a PMOS and a first comparator, and a second internal voltage generator including an NMOS, a second comparator, and a voltage pump generator configured to provide a pumping power voltage to the second comparator. A power control circuit switchably enables an output from the first internal voltage generator during a power-on of the semiconductor integrated circuit and enables an output from the second internal voltage generator after the power-on.


