Dual-Interposer Semiconductor Package for Soft Error and Heat Control
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Solution Overview
Problem
The reliability of semiconductor devices is compromised due to soft errors in volatile memory circuits, mechanical reliability issues, and thermal challenges caused by high performance and functionality, particularly in flip-chip structures where the mismatch in coefficients of linear expansion between interposers and semiconductor chips leads to connection failures and increased heat generation.
Innovation Solution
A semiconductor device configuration is introduced where a second interposer with higher radiation shielding and mechanical and thermal characteristics is added between the first interposer and the semiconductor chip, allowing for flip-chip mounting, which improves soft error immunity and thermal reliability by reducing stress and heat dissipation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single interposer is used for mounting the semiconductor chip, then the device structure is simple, but soft error immunity and thermal reliability are insufficient
Solution Approach 1:
A second interposer is introduced as an intermediary component between the first interposer and the semiconductor chip. This second interposer specifically addresses soft error immunity by providing radiation shielding, while the first interposer handles mechanical support and thermal management. This division of functions resolves the contradiction by improving reliability through specialized intermediaries without requiring a complete redesign of the entire interposer structure.
Solution Approach 2:
The interposer system is segmented into two distinct interposers with different materials and functions. The first interposer (e.g., organic material) provides mechanical support and thermal dissipation, while the second interposer (e.g., silicon or silicon carbide) provides radiation shielding. This segmentation allows each component to be optimized for its specific function, improving overall reliability without excessive complexity.
2Reliability
If the coefficient of linear expansion mismatch between interposer and semiconductor chip is large, then manufacturing is easier, but mechanical reliability deteriorates due to connection failures
Solution Approach 1:
The coefficient of linear expansion parameter is carefully selected and matched between the second interposer and the semiconductor chip. By choosing materials with compatible thermal expansion characteristics, the patent reduces mechanical stress and connection failures during thermal cycling, thereby improving mechanical reliability while maintaining manufacturability through standardized material selections.
3Productivity
If high performance and functionality are implemented, then device capability is improved, but heat generation increases causing thermal challenges
Solution Approach 1:
The thermal management function is extracted and assigned to the first interposer, which is made of materials with high thermal conductivity and heat dissipation capability. This allows the high-performance semiconductor chip to operate at elevated performance levels while the first interposer actively removes generated heat, preventing thermal accumulation and maintaining device reliability.
Solution Approach 2:
The dual-interposer structure employs composite material selection where the first interposer uses materials optimized for thermal management (e.g., organic substrates with high thermal conductivity) and the second interposer uses materials optimized for radiation shielding (e.g., silicon, silicon carbide). This composite approach allows simultaneous achievement of high device performance and effective thermal control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the mechanical and thermal reliability of the semiconductor device, reducing soft errors and heat-related issues, while maintaining a low profile and high performance.
Implementation Method 1
A material of the second interposer is different from that of the first interposer... the second interposer overlaps the first semiconductor chip in a direction perpendicular to the first main surface
Implementation Method 2
The first semiconductor chip is mounted on the second main surface through a plurality of bump electrodes
Data Source
AI summary
In a semiconductor device, a first interposer has a first main surface. A second interposer is disposed on the first main surface. The second interposer has a second main surface on a side opposite to the first interposer. A material of the second interposer is different from that of the first interposer. A first semiconductor chip has a first front surface. The first semiconductor chip is mounted on the second main surface through a plurality of bump electrodes with the first front surface facing the second main surface. The first semiconductor chip includes a volatile memory circuit. A second semiconductor chip is mounted on a plurality of electrode patterns disposed on the first main surface or the second main surface through a plurality of bonding wires. The second interposer overlaps the first semiconductor chip in a direction perpendicular to the first main surface.