Dual Isolation Regions for CMOS Image Sensor Leakage
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Solution Overview
Problem
Conventional CMOS image sensors face challenges in minimizing hot pixels and dark current due to current leakage between pixels and devices, which is exacerbated by the trade-off between isolation types used in pixel arrays and periphery regions, where isolation advantageous for one may not be effective for the other.
Innovation Solution
The implementation of distinct isolation regions in the pixel array and periphery regions of CMOS image sensors, using different configurations such as shallow trench isolation (STI), Local Oxidation of Silicon (LOCOS), and doped regions, tailored to address specific leakage issues in each area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If shallow trench isolation (STI) regions are used to isolate pixels, then isolation between adjacent pixels is improved, but hot pixels occur due to current leakage at the junction between active device regions and the trench
Solution Approach 1:
The patent applies different isolation techniques to different regions: STI is used in the pixel array region where tight isolation is needed, while LOCOS is used in the periphery region where it provides better stress control and prevents hot pixels. This local differentiation resolves the contradiction by optimizing each region's isolation method to its specific requirements.
Solution Approach 2:
The patent segments the isolation structure into two distinct parts: array isolation regions within the pixel array and periphery isolation regions surrounding the pixel array. Each segment uses a different isolation technique (STI vs. LOCOS) tailored to its specific functional requirements, allowing simultaneous optimization of both pixel isolation and hot pixel prevention.
2Reliability
If isolation regions are increased to reduce current leakage, then dark current is reduced, but device complexity and fabrication difficulty increase
Solution Approach 1:
The patent implements isolation regions selectively in specific areas where they are most needed (pixel array and periphery regions) rather than uniformly across the entire device. This partial application reduces the overall complexity and fabrication burden while still achieving sufficient dark current reduction in the critical regions.
3Ease of manufacture
If the same isolation type is used throughout the device, then manufacturing process is simplified, but isolation performance is suboptimal for both pixel array and periphery devices
Solution Approach 1:
The patent employs different isolation types (STI for pixel array, LOCOS for periphery) in different regions based on their specific performance requirements. This local quality approach optimizes isolation performance for each region's specific needs while maintaining a manageable manufacturing process through systematic differentiation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces hot pixels and dark current by optimizing isolation in both pixel and periphery regions, enhancing the overall performance and accuracy of CMOS image sensors.
Implementation Method 1
Each photo-sensitive device is sensitive to light in such a way that it can create an electrical charge that is proportional to the intensity of light striking the photo-sensitive device
Implementation Method 2
These isolation regions may assist in preventing leakage current between the various devices
Data Source
AI summary
Methods, methods of making, devices, and systems for image sensors that include isolation regions are disclosed. A semiconductor imager includes a pixel array and peripheral circuitry arranged on at least one side of the pixel array. Array devices are formed as part of the pixel array and periphery devices are formed in the periphery. Array isolation regions are disposed around at least a portion of at least some of the array devices and periphery isolation regions are disposed around at least a portion of at least some of the periphery devices. Within the semiconductor imager, the periphery isolation regions are configured differently from the array isolation regions. The semiconductor image sensor may be included in as part of an imaging system that includes a processor.