Dual ISP Image Processing Device for Parallel Resolution Handling

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Image signal processors (ISPs) face challenges in simultaneously processing dual image streams with different resolutions, requiring high processing speed and capacity, which increases power consumption and complicates signal processing algorithms.

Innovation Solution

An image processing device with two ISPs, one for low-resolution and one for high-resolution images, operating in parallel with separate line buffers and kernel sizes, allowing for efficient processing and reduced power consumption by optimizing the operating speed and kernel size based on the image resolution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a single ISP processes both low-resolution and high-resolution image streams simultaneously, then processing capacity is improved, but power consumption increases and processing speed decreases

Engineering Contradiction:
Improveprocessing capacityVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The image processing system is divided into two separate ISPs: a first ISP dedicated to processing low-resolution image streams and a second ISP dedicated to processing high-resolution image streams. This segmentation allows each processor to be optimized for its specific resolution type, preventing the power consumption and speed degradation that would occur if a single processor handled both resolutions simultaneously.

Inventive Principle:
Principle #1Segmentation

2Productivity

If a single ISP processes high-resolution images, then processing capacity is improved, but processing speed decreases due to large line buffer requirements

Engineering Contradiction:
Improveprocessing capacityVSAvoidprocessing speed
Core Design Contradiction:
ProductivityVSSpeed

Solution Approach 1:

By separating high-resolution and low-resolution processing into different ISPs, the system allows the second ISP to maintain a line buffer size optimized for high-resolution processing without being constrained by low-resolution processing requirements. This enables high processing capacity for high-resolution images while maintaining appropriate processing speed through dedicated hardware resources.

Inventive Principle:
Principle #1Segmentation

3Device complexity

If a single ISP processes multiple resolutions, then device complexity is reduced, but ease of operation deteriorates due to complex signal processing algorithms

Engineering Contradiction:
Improvedevice complexityVSAvoidease of operation
Core Design Contradiction:
Device complexityVSEase of operation

Solution Approach 1:

The system uses two separate ISPs with dedicated line buffers and processing pipelines for different resolutions, which simplifies the control logic for each processor. The first ISP handles low-resolution streams with smaller line buffers while the second ISP handles high-resolution streams with larger line buffers, eliminating the need for complex dynamic algorithm switching that would be required in a single-processor system.

Inventive Principle:
Principle #1Segmentation

4Productivity

If line buffer size is increased for high-resolution processing, then processing capacity is improved, but device complexity increases

Engineering Contradiction:
Improveprocessing capacityVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system allocates separate line buffers to each ISP: a first line buffer in the first ISP for low-resolution processing and a second line buffer in the second ISP for high-resolution processing. This segmentation allows each buffer to be sized appropriately for its specific processing requirements, achieving high processing capacity for high-resolution images without requiring the entire system to accommodate the largest buffer size, thus managing device complexity effectively.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9538087B2Image processing device with multiple image signal processors and image processing method
Publication Date: 2017.01.03 SAMSUNG ELECTRONICS CO LTD
  • US9538087B2 patent drawing
  • US9538087B2 patent drawing
  • US9538087B2 patent drawing

AI summary

An image processing device includes first and second image signal processors (ISPs) independently capable of processing an image received from an image sensor. The first ISP processes a first image having a first resolution and the second ISP processes a second image having a different second resolution.