Dual Junction MRAM Cell for Ternary Content Addressable Memory
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional ternary content addressable memory (TCAM) cells are large, costly, and power-intensive due to their complex transistor structures and volatile nature, limiting their use in high-speed lookup applications.
Innovation Solution
A magnetic random access memory (MRAM) cell with a dual magnetic tunnel junction is developed, capable of storing three distinct states ('1', '0', and 'X') using thermally-assisted writing and self-referenced reading, reducing cell size and power consumption by leveraging antiferromagnetic layers and tunnel barrier layers for efficient magnetization control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional SRAM-based TCAM cells are used to achieve ternary storage functionality, then the device can store three distinct states (1, 0, and don't care), but the cell size becomes extremely large requiring fourteen to sixteen transistors per cell
Solution Approach 1:
The patent replaces the mechanical transistor-based switching system with a magnetic system using magnetic tunnel junctions (MTJs). The MTJ utilizes magnetization orientation (parallel or antiparallel) to represent binary states, and by combining multiple MTJs with appropriate logic circuitry, ternary states are achieved. This substitution of magnetic storage for transistor-based storage dramatically reduces cell size while maintaining ternary functionality.
Solution Approach 2:
The patent changes the fundamental storage parameter from electrical charge state (in SRAM) to magnetization orientation (in MTJ). By utilizing the two stable magnetization states of ferromagnetic layers and combining multiple MTJs, the system achieves three distinct resistance states that enable ternary content addressable memory functionality with much smaller physical footprint.
2Ease of operation
If SRAM cells with comparison logic are used to implement TCAM functionality, then matching operations can be performed, but the device requires fourteen to sixteen transistors per cell leading to high cost
Solution Approach 1:
The patent replaces the transistor-based comparison logic with magnetic logic operations. The magnetic tunnel junctions inherently provide the comparison function through their resistance states when subjected to write currents. The antiparallel magnetization configuration of reference and storage layers creates the necessary logic functionality without requiring additional transistors for comparison operations, thereby reducing manufacturing cost.
3Speed
If conventional TCAM cells are used to achieve high-speed search, then matching speed is maintained, but the device consumes large power due to volatile nature requiring active circuits on every clock cycle
Solution Approach 1:
The patent replaces the volatile SRAM-based system with a non-volatile magnetic memory system. The magnetic tunnel junctions retain their magnetization states without power, eliminating the need for continuous refreshing or active maintenance circuits. This non-volatility allows the TCAM to maintain high search speed while dramatically reducing power consumption, as no power is needed to maintain the stored state.
Solution Approach 2:
The magnetic memory system is self-maintaining through its non-volatile nature. The magnetization states in the MTJs persist without external intervention or power supply, eliminating the need for active refresh circuits that consume power in volatile SRAM-based systems. The system serves itself by inherently preserving its state.
4Productivity
If SRAM-based TCAM cells are used to implement content addressable memory, then parallel comparison is achieved, but the large number of transistors per cell results in large die size
Solution Approach 1:
The patent replaces the transistor-intensive SRAM cell structure with a compact magnetic tunnel junction-based cell. Each MTJ occupies significantly less area than the fourteen to sixteen transistors required for equivalent functionality in SRAM. This substitution enables high-density integration of multiple TCAM cells on a single chip, maintaining parallel comparison capability while reducing overall die size.
Solution Approach 2:
The patent employs composite magnetic layer structures within the MTJ, combining ferromagnetic layers, antiferromagnetic layers, and tunnel barrier materials. This composite structure enables the magnetic functionality in a compact vertical stack rather than a lateral transistor array, achieving high integration density and reduced die size while maintaining parallel comparison operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The MRAM cell implementation significantly reduces TCAM cell size and cost while enhancing endurance to voltage cycling and allowing for efficient 'don't-care' state handling, enabling faster and more power-efficient search operations.
Implementation Method 1
each magnetic tunnel junction being formed from a storage layer, a sense layer, and an insulating layer between the storage layer and the sense layer
Implementation Method 2
providing a heating current to the magnetic element to heat the magnetic element above a blocking temperature of the antiferromagnetic layer
Implementation Method 3
providing a write current to the conductor line to switch a magnetization direction of the storage layer
Data Source
Figure 1
Figure 2(a)~2(c)
AI summary
The present disclosure concerns a magnetic random access memory (MRAM) cell (1) comprising a soft ferromagnetic layer (21) having a magnetization that can be freely aligned; a first hard ferromagnetic layer (23) having a first storage magnetization (230); a first tunnel barrier layer (22) comprised between the soft ferromagnetic layer (21) and the a first hard ferromagnetic layer (23); a second hard ferromagnetic layer (25) having a second storage magnetization (250); and a second tunnel barrier layer (24) comprised between the soft ferromagnetic layer (21) and the second hard ferromagnetic layer (25); wherein the first storage magnetization (230) can be freely oriented at a first high predetermined temperature threshold (Tw1) and the second storage magnetization (250) can be freely oriented at a second predetermined high temperature threshold (Tw2); the first high predetermined temperature threshold (Tw1) being higher than the second predetermined high temperature threshold (Tw2). The MRAM cell (1) disclosed herein can be used as a ternary content addressable memory (TCAM) and store up to three distinct state levels. The MRAM cell has a reduced size and can be made at low cost.