Dual-Latch Pulse Controller for Stable MOSFET Conduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional pulse controllers with single latch circuits suffer from insufficient conduction stability, error triggering due to floating gate potential, temperature variations, and lack of surge noise interference, leading to instability under heavy loads.
Innovation Solution
A dual-latch pulse controller architecture with complementary interaction between first and second latch units, incorporating a temperature compensating mechanism and feedback from the power output unit to ensure sufficient conduction and limit maximum duty cycle, replacing the conventional pulse controller chip.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a single latch circuit is used to replace the pulse controller chip, then production cost is reduced, but conduction stability becomes insufficient and error triggering occurs
Solution Approach 1:
The single latch circuit is segmented into two separate latch circuits (first latch circuit and second latch circuit). Each latch circuit independently controls one gate of the MOSFET, providing sufficient conduction drive capability and eliminating the instability caused by a single latch circuit attempting to control both gates.
Solution Approach 2:
A bias voltage generation circuit is introduced as an intermediary component to provide stable bias voltages to both latch circuits. This mediator ensures that the latch circuits receive appropriate voltage levels for stable operation, preventing error triggering due to floating gate potential.
2Device complexity
If a single latch circuit is used, then device complexity is reduced, but temperature compensation capability is lost causing leakage current
Solution Approach 1:
The temperature compensation function is segmented into two separate bias voltage generation circuits, each associated with a latch circuit. This segmentation allows independent temperature compensation for each latch, effectively counteracting temperature-induced leakage current while maintaining relatively simple circuit architecture.
3Device complexity
If a single latch circuit is used, then the circuit architecture is simplified, but surge noise interference causes error triggering
Solution Approach 1:
The circuit architecture is segmented into two independent latch circuits with separate bias voltage generation circuits. This segmentation isolates the impact of surge noise, preventing it from affecting the entire control system and causing error triggering, while keeping the overall architecture relatively simple.
4Device complexity
If a single latch circuit is used, then device complexity is reduced, but maximum duty cycle limitation mechanism causes instability under heavy load
Solution Approach 1:
The duty cycle control function is segmented between two latch circuits, each capable of independent operation. This segmentation allows for better distribution of control responsibilities and improved system stability under heavy load conditions, while maintaining a relatively simple control mechanism without requiring complex limitation circuits.
Data Source
AI summary
A pulse controller with dual latches includes a first latch unit and a second latch unit, in which two latch units are used to latch signal level for ensuring a sufficient conducting amount of the switching element in the rear end power output unit, and through a mutual interaction between the first and the second latch units, a complementary turning-on and turning-off situation therebetween is formed, and further, the signal from a trigger signal source and the feedback from the power output unit are employed to generate the duty cycle signal for the power output unit so as to replace the conventional pulse width modulation circuit.