Dual-Active-Layer Transistor Layout for Independent Gate Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Transistors used in electronic devices, particularly in flat panel displays, face challenges in achieving optimal operational characteristics due to variations in channel layer materials, which affect their electrical properties and efficiency.
Innovation Solution
The design incorporates two active layers with separate gates and electrodes, allowing for independent control of electrical characteristics by applying voltages to each gate, with one active layer being closer to the first gate and the other closer to the second gate, and the electrodes being partially disposed between the active layers to enhance contact area and control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a single active layer with one gate is used, then the device structure is simple, but the operational characteristics cannot be optimized independently
Solution Approach 1:
The transistor is divided into two active layers (first and second active layers) with separate gates (first gate and second gate), allowing independent control of electrical characteristics for each layer. This segmentation enables versatile operational modes such as independent switching or combined operation, resolving the contradiction between control adaptability and structural simplicity.
2Area of stationary object
If the source and drain electrodes are positioned only at the ends of active layers, then the manufacturing process is simple, but the contact area is limited
Solution Approach 1:
The source and drain electrodes are positioned not only at the end portions but also at the middle portions of the active layers, utilizing the vertical and lateral dimensions to maximize contact area. This multi-position electrode configuration increases the effective contact area without significantly complicating the manufacturing process, as it follows a systematic pattern of placement at both end and middle regions.
Data Source
AI summary
A transistor includes a first active layer having a first channel region and a second active layer having a second channel region. A first gate of the transistor is configured to control electrical characteristics of at least the first active layer and a second gate is configured to control electrical characteristics of at least the second active layer. A source electrode contacts the first and second active layers. A drain electrode also contacts the first and second active layers.