Dual Level Shifter Circuitry for Faster Edge Transitions
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Solution Overview
Problem
Level shifters in integrated circuits respond more slowly to falling edge transitions compared to rising edge transitions, limiting their maximum operating frequency, and increasing DC current leakage to enhance frequency performance results in higher power consumption.
Innovation Solution
A level shifting circuitry comprising two level shifters, one optimized for faster response to falling edge transitions and the other to rising edge transitions, with output switching circuitry that prioritizes primary transitions to achieve quick signal switching without significant impact from secondary transitions, allowing for higher frequency operation without increased DC current leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single level shifter is used to handle both rising and falling edge transitions, then the circuit structure remains simple, but the maximum operating frequency is limited due to slower falling edge response
Solution Approach 1:
The level shifter is divided into two separate level shifters: a first level shifter optimized for falling edge transitions and a second level shifter optimized for rising edge transitions. Each level shifter handles one type of edge transition independently, allowing both to be optimized for their respective functions without compromising the other, thereby increasing the maximum operating frequency while maintaining reasonable circuit complexity
Solution Approach 2:
The outputs of the first and second level shifters are merged through output switching circuitry that selects between the two intermediate signals based on the input signal edge transition type. This merging allows the circuit to benefit from both specialized level shifters while presenting a unified output interface, resolving the contradiction between structural simplicity and high-frequency performance
2Productivity
If DC current leakage is increased to enhance frequency performance, then the maximum operating frequency increases, but power consumption increases
Solution Approach 1:
Different transistor sizing strategies are applied locally to different parts of the circuit based on their specific functions. The first level shifter uses transistor sizes optimized for fast falling edge response with minimal DC leakage, while the second level shifter uses transistor sizes optimized for fast rising edge response. The output switching circuitry selectively activates only the required level shifter based on the input edge transition type, ensuring that DC current leakage is minimized while maintaining high-frequency performance
Solution Approach 2:
The output switching circuitry periodically selects between the two intermediate signals based on the edge transition type of the input signal. By activating only the appropriate level shifter for each transition type (falling edge or rising edge), the circuit achieves high-frequency response without continuously drawing DC current through both level shifters, thereby reducing overall power consumption while maintaining high operating frequency capability
Data Source
AI summary
Level shifting circuitry comprises a first level shifter and a second level shifter. In response to a falling edge transition of an input signal, the first level shifter generates a primary transition of a first intermediate signal faster than the second level shifter generates a secondary transition of a second intermediate signal. In response to a rising edge of the input signal, the second level shifter generates a primary transition of the second intermediate signal faster than the first level shifter generates a secondary transition of the first intermediate signal. Output switching circuitry is provided to switch an output signal between an output high voltage level and an output low voltage level in response to the primary transition of the first intermediate signal and the primary transition of the second intermediate signal.