Dual Level Shifter Gate Drive for Low-Power Fast Switching
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Solution Overview
Problem
Existing level shifters face challenges in reducing power consumption and propagation delay while maintaining accurate switching operations, as they are vulnerable to electrical noise, which can lead to incorrect operation of high and low side switches, potentially causing overcurrent and switch destruction.
Innovation Solution
The proposed driving circuit employs a dual-level shifter configuration with pulse-on and pulse-off currents, managed by gate drivers and controllers, to synchronize control signals with transistor states, using current mirror circuits and resistors to maintain switch states without a latch circuit, thereby reducing power consumption and propagation delay.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If continuous current is input to a level shifter, then accuracy of switching operation is improved, but power consumption increases
Solution Approach 1:
The patent uses periodic pulse signals instead of continuous current to control the level shifter. The control signal is applied in periodic pulses that synchronize with the switching frequency, maintaining accurate switching operation while significantly reducing power consumption by eliminating continuous current flow.
Solution Approach 2:
The patent changes the parameter of the control signal from continuous to pulsed form. By modifying the temporal characteristics of the control signal to periodic pulses, the system achieves both accurate switching (through synchronized pulse timing) and reduced power consumption (through intermittent current flow).
2Use of energy by moving object
If power consumption of level shifter is decreased, then propagation delay increases
Solution Approach 1:
The patent employs periodic pulse signals that are synchronized with the switching frequency. These pulses provide sufficient current during critical switching moments to maintain fast propagation delay, while the intermittent nature of the pulses reduces overall power consumption compared to continuous current drive.
Solution Approach 2:
The patent maintains continuous useful action by ensuring that pulse signals are continuously applied at the correct timing moments. Although the current is pulsed rather than continuous, the useful switching action remains continuous and synchronized, preventing propagation delay increase while reducing power consumption.
Data Source
AI summary
The present invention related to a driving circuit including a level shifter. The driving circuit according to exemplary embodiment of the present invention includes a first level shifter, a second level shifter, and a gate driver. The first level shifter includes a path along which a pulse-on current flows in response to an on-control signal and a path along which a pulse-off control flows in response to an off-control signal. The second level shifter includes a path along which an on-current flows in response to the on-control signal and a path along which an off-control flows in response to the off-control signal. The gate driver turns on the switch in response to the pulse-on current, maintains the turned-on switch in the turn-on state in response to the on-control current, turns off the switch in response to the pulse-off current, and maintains the turned-off switch in the turn-off state in response to the off-control current.