Dual-Liner Isolation Structure for Semiconductor End-Surface Protection

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Solution Overview

Problem

Existing isolation structures in ICs with a single silicon nitride liner face issues such as thinning, agglomeration, and oxidation of semiconductor layer end surfaces during processing, leading to increased current leakage in transistors.

Innovation Solution

The proposed isolation structure features a lower portion with a first liner and an upper portion with a second liner, where the second liner is vertically over the first liner and surrounds a first dielectric material. This configuration prevents exposure of semiconductor layer end surfaces during subsequent processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a single silicon nitride liner is used in the isolation structure, then the manufacturing process is simple, but the semiconductor layer end surfaces suffer from thinning, agglomeration, and oxidation during subsequent processing

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidprotection of semiconductor layer end surfaces
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The single liner is divided into two separate liners: a first liner (silicon nitride) formed in the trench, and a second liner (silicon oxide) formed over the first liner and semiconductor layer end surfaces. This segmentation allows each liner to perform its specialized function - the first liner provides trench definition while the second liner protects the exposed end surfaces from damage during subsequent processing

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The second liner acts as an intermediary protective layer between the semiconductor layer end surfaces and the harsh processing environment. It mediates the interaction by providing a sacrificial barrier that prevents direct exposure of the semiconductor layer to damaging processes, thereby preventing thinning, agglomeration, and oxidation

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If the dielectric material is recessed within the trench during formation, then the isolation structure can be formed, but the single liner is damaged and the semiconductor layer end surfaces are exposed to damage

Engineering Contradiction:
Improveisolation structure formationVSAvoiddamage to semiconductor layer end surfaces
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

The second liner is formed in advance before the dielectric material recessing step. This preliminary action ensures that the protective barrier is already in place to shield the semiconductor layer end surfaces from damage that will occur during the subsequent dielectric recessing and other processing steps

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The second liner provides beforehand cushioning protection for the semiconductor layer end surfaces. It acts as a sacrificial buffer layer that absorbs the mechanical and chemical stresses of subsequent processing, preventing direct damage to the semiconductor layer while allowing the isolation structure to be properly formed

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS20250029869A1Isolation structure having different liners on upper and lower portions
Publication Date: 2025.01.23 GLOBALFOUNDRIES US INC
  • US20250029869A1 patent drawing
  • US20250029869A1 patent drawing
  • US20250029869A1 patent drawing

AI summary

An isolation structure for a substrate is disclosed. The isolation structure includes a lower portion having a first liner, and an upper portion having a second liner vertically over the first liner. A first dielectric material is surrounded by the second liner from above and by the first liner from below and laterally. The second liner may include a second dielectric material in at least part thereof. The second liner prevents exposure of end surfaces of a semiconductor layer of the substrate during subsequent processing, which prevents damage such as thinning, agglomeration and/or oxidation that can negatively affect performance of a transistor formed using the semiconductor layer. The second liner also reduces an overall step height of the isolation structure.