Memory Device With Dual Logic Interfaces for Direct Data Movement
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Solution Overview
Problem
Conventional memory sub-systems face latency and lower bandwidth issues due to a two-step data transfer process between memory and storage regions, leading to increased power consumption and congestion on host-switch links.
Innovation Solution
A memory sub-system with a dual logic interface and an internal data mover that facilitates direct data transfer within the same memory module, reducing the need for external DMA transfers and optimizing data movement between memory and storage regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If data transfer between memory and storage regions is performed through external DMA transfers, then data movement can be achieved, but latency increases and bandwidth decreases
Solution Approach 1:
The patent merges the memory interface and storage interface into a unified dual logic interface that both interfaces share. This allows data to be transferred directly between memory and storage regions within the same memory module without requiring external DMA transfers, thereby reducing latency and increasing transfer speed.
Solution Approach 2:
The dual logic interface acts as an intermediary that enables direct internal data movement between memory and storage regions. By providing this internal pathway, the system eliminates the need for data to traverse external buses and controllers, thus reducing transfer time and latency.
2Productivity
If external DMA transfers are used for data movement, then data can be transferred between memory and storage, but power consumption increases
Solution Approach 1:
By merging the memory and storage interfaces into a shared dual logic interface, the patent enables internal data transfers that avoid the high power consumption associated with external DMA operations. Data can be moved efficiently between regions without activating external transfer mechanisms.
Solution Approach 2:
The memory module performs data transfers between its own internal regions (memory and storage) using its internal dual logic interface, without requiring external assistance from host processors or external DMA controllers. This self-service capability reduces power consumption by keeping transfers internal.
3Ease of operation
If external DMA transfers are used, then data movement is possible, but congestion occurs on host-switch links
Solution Approach 1:
The patent extracts the data transfer function from the external host-switch link pathway and relocates it to an internal pathway within the memory module. By taking out the transfer operation from the external bus, the system eliminates congestion on host-switch links while maintaining data transfer capability.
Solution Approach 2:
The dual logic interface serves as an intermediary that provides an alternative internal pathway for data transfers. This intermediary pathway bypasses the external host-switch links, preventing congestion while enabling continued data movement between memory and storage regions.
Data Source
AI summary
A data mover in a memory device receives a base address for a physical memory region. The data mover determines that a cache line in the physical memory region is in a modified state and determines a second address in a storage region of the memory device using a lookup table stored in the data mover. The data mover then stores the modified cache line and metadata associated with the modified cache line at the second address in the storage region. The data mover upon receiving a synchronization request from a host processor, and upon determining that the cache line is in the modified state, updates the modified cache line and metadata associated with the modified cache line in the storage region of the memory device. The data mover includes a direct memory access (DMA) controller.