Dual-Loop DC-to-DC Converter Input Voltage Regulation
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Solution Overview
Problem
DC-to-DC converters face instability and inefficiency when the input voltage from a power source, such as a fuel cell, drops due to high series resistance, leading to insufficient output power delivery as the load consumes increasing current, causing the output voltage to fall below desired levels.
Innovation Solution
A dual loop DC-to-DC converter system that generates PWM clock signals with adjustable duty cycles to maintain the output voltage within a desired range while ensuring the input voltage remains above a minimum value, using a duty cycle selection module to concurrently regulate the output voltage and input current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the load consumes increasing input current to supply higher output power, then the output power increases, but the input voltage drops due to high series resistance causing output voltage to fall below desired levels
Solution Approach 1:
The patent implements a dual-loop feedback control system where the first control loop monitors output voltage and adjusts PWM duty cycle accordingly, while the second control loop monitors input voltage and adjusts duty cycle to prevent excessive voltage drop. This nested feedback structure ensures both output power delivery and voltage regulation are maintained simultaneously
Solution Approach 2:
The system dynamically adjusts the PWM duty cycle based on real-time conditions by selecting between two control loops. When the load requires higher power, the system automatically transitions to allow higher duty cycles while maintaining input voltage within acceptable ranges, enabling adaptive response to varying load demands
2Reliability
If the DC-to-DC converter draws more input current to maintain desired output voltage, then the output voltage regulation improves, but the input voltage drops further due to series resistance reducing available power
Solution Approach 1:
The control system dynamically selects between voltage regulation mode and power delivery mode based on operating conditions. When input voltage approaches minimum thresholds, the system automatically adjusts to prevent excessive current draw, transitioning from aggressive voltage regulation to power-constrained operation to avoid destabilizing the input voltage further
Solution Approach 2:
The system changes the PWM duty cycle parameter dynamically based on feedback from both voltage loops. By adjusting this key parameter within safe operating boundaries determined by the dual-loop control, the system optimizes the balance between maintaining output voltage and preventing input voltage collapse
3Device complexity
If a single control loop regulates output voltage, then the circuit complexity is low, but the system becomes unstable when input voltage drops due to high series resistance
Solution Approach 1:
The control system is segmented into two independent but coordinated control loops: one dedicated to output voltage regulation and another dedicated to input voltage protection. Each loop operates with its own error amplifier and duty cycle generator, dividing the complex control task into manageable segments that can be independently optimized and implemented using standard PWM controller ICs
Data Source
AI summary
A dual loop DC-to-DC converter is provided that includes a first control loop that maintains a DC output voltage (VOUT) less than or equal to a desired maximum value of the VOUT, a second control loop that operates simultaneously with the first control loop and maintains a DC input voltage (VIN) greater than or equal to a desired minimum value of the VIN, and a duty cycle selection module. The first control loop generates a first clock signal having a first duty cycle, and the second control loop generates a second clock signal having a second duty cycle. The duty cycle selection module continuously determines which one of the first duty cycle and the second duty cycle has a lower duty cycle value, and continuously generates a PWM output signal having a modulated duty cycle equal to the lower duty cycle value.