Dual-Loop LDO Regulator Gating for Low-Voltage Stability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional voltage regulators struggle with high power consumption and inefficiency when operating at low input voltages, particularly in highly integrated semiconductor devices, leading to issues with transient response, ripple, and power supply rejection ratio (PSRR).
Innovation Solution
A low dropout (LDO) regulator with a dual-loop control mechanism, incorporating coarse and fine power transistors, and a gate driving unit that generates gating signals using both input voltage and its negative, enabling stable operation at low input voltages by adjusting transistor gating based on output voltage differences.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional voltage regulators are used to operate at low input voltages, then power consumption increases and efficiency decreases, but using traditional regulator designs maintains simpler circuit structure
Solution Approach 1:
The patent divides the voltage regulation function into two separate control loops: a coarse control loop for large voltage adjustments and a fine control loop for precise voltage regulation. This segmentation allows the system to achieve low power consumption across different operating ranges while managing circuit complexity through functional division
Solution Approach 2:
The patent implements dynamic switching between coarse and fine control loops based on the voltage difference between input and output. When the voltage difference is large, the coarse loop is activated; when the difference is small, the fine loop takes over. This dynamic adaptation optimizes power consumption while maintaining regulation accuracy across varying load conditions
2Reliability
If conventional LDO regulators are used, then transient response and ripple performance deteriorate at low voltages, but implementing dual-loop control increases device complexity
Solution Approach 1:
The patent segments the control mechanism into coarse and fine loops, where the coarse loop handles large-signal transient responses and the fine loop manages small-signal ripple suppression. This segmentation improves transient response and ripple performance without requiring a complete redesign of the entire control system
Solution Approach 2:
The patent introduces a control unit as an intermediary that manages the switching between coarse and fine loops. This intermediary component coordinates the two control mechanisms, allowing them to work together seamlessly to improve transient response and ripple performance while keeping the overall system architecture manageable
3Measurement precision
If single-loop control is used, then voltage regulation precision decreases, but implementing dual-loop control increases power consumption
Solution Approach 1:
The patent dynamically selects which control loop to activate based on the voltage difference magnitude. The coarse loop is used when the voltage difference is large, consuming more power but providing faster response. The fine loop is used when the voltage difference is small, consuming less power and providing precise regulation. This dynamic selection optimizes the balance between precision and power consumption
Solution Approach 2:
The patent applies partial action by using only the necessary control loop for each operating condition. The coarse loop provides sufficient control for large voltage differences without needing the fine loop's precision, reducing power consumption. Conversely, the fine loop provides excessive precision for small voltage differences where full precision is not always required, optimizing the power-precision tradeoff
Data Source
AI summary
A low dropout (LDO) regulator includes: one or more power transistors configured to dispose between an input node and an output node, wherein the input node is a node to which an input voltage is applied and the output node is a node from which an output voltage is output; a voltage comparing unit configured to generate a comparative signal based on a difference between the output voltage and a first reference voltage; a digital control unit configured to generate a control signal for gating of the one or more power transistors in response to the comparative signal; and a gate driving unit configured to output a gating signal for the one or more power transistors in response to the control signal, wherein the gating signal is corresponding to one of the input voltage and a negative of the input voltage.