Dual-Loop LDO Regulator for Fast Load-Transient Voltage Stability
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Solution Overview
Problem
Conventional regulators face challenges in maintaining a stable output voltage when current consumption to system loads changes rapidly, leading to fluctuations in voltage levels.
Innovation Solution
A low dropout (LDO) regulator design incorporating a flipped voltage follower, error amplifier, and active inductor, which includes transistors and resistors to stabilize output voltage by adjusting current flow based on changes in load current, using fast and slow loops to maintain target voltage levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional regulators are used to maintain output voltage, then voltage stability is achieved under normal conditions, but voltage fluctuations occur when load current changes rapidly
Solution Approach 1:
The regulator is divided into two separate loops: a fast loop using a first transistor to respond quickly to load changes, and a slow loop using a second transistor to maintain steady-state accuracy. This segmentation allows each loop to be optimized for its specific function, resolving the contradiction between response speed and voltage stability.
Solution Approach 2:
The regulator dynamically switches between different operating modes by using the fast loop for transient response and the slow loop for steady-state regulation. The control circuit dynamically adjusts the operation of first and second transistors based on load conditions, enabling the system to adapt its response characteristics to maintain both speed and stability.
2Speed
If additional current supply is used to improve response speed, then transient response improves, but power consumption increases
Solution Approach 1:
The fast loop uses a first transistor that operates only during transient conditions to provide the necessary current boost for quick response. During steady-state operation, the slow loop takes over with lower current consumption. This partial action approach provides excessive current only when needed, avoiding continuous high power consumption while maintaining fast response capability.
3Device complexity
If the regulator structure is simplified, then device complexity is reduced, but bandwidth and response capability are limited
Solution Approach 1:
The patent merges a fast transient response path with a slow steady-state regulation path into a unified regulator structure. The fast loop and slow loop are combined through shared components and coordinated control, achieving wide bandwidth and fast response without requiring completely separate independent systems, thus balancing complexity with performance.
Data Source
AI summary
Disclosed is a low dropout regulator which includes a first resistor, a first transistor including a gate terminal connected with a first end of the first resistor, a source terminal connected with a power supply voltage terminal, and a drain terminal connected with a first node, an operational amplifier including input terminals respectively connected with a reference voltage and the first node and an output terminal, a second transistor including a gate terminal connected with the output terminal of the operational amplifier, a source terminal connected with the first node, and a drain terminal connected with a second node, a third transistor including a gate terminal connected with a second end of the first resistor, a source terminal connected with the power supply voltage terminal, and a drain terminal connected with a third node, and a current source connected between the second node and a ground voltage terminal.