Dual-Loop LDO Regulator for Fast Transient and Stable Output

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Solution Overview

Problem

Conventional voltage regulator circuits face challenges in providing rapid transient response and long-term stability, particularly in low dropout (LDO) regulators, which can lead to voltage droop under changing load conditions.

Innovation Solution

A dual loop LDO voltage regulator circuit is implemented, comprising a first current mirror for fast transient response and a second control loop with a feedback circuit for longer-term stability, ensuring rapid current delivery and maintaining output voltage stability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a conventional LDO voltage regulator is used, then the circuit design remains simple, but the transient response time is slow leading to voltage droop under changing load conditions

Engineering Contradiction:
Improvetransient response timeVSAvoidcircuit design complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The voltage regulator is divided into two separate control loops: a first control loop using a first current mirror for fast transient response, and a second control loop using a second current mirror for long-term stability. This segmentation allows each loop to be optimized for its specific function, resolving the contradiction between fast response and circuit simplicity.

Inventive Principle:
Principle #1Segmentation

2Reliability

If a single control loop is used in LDO regulator, then the circuit remains simple, but it cannot simultaneously provide fast transient response and long-term stability

Engineering Contradiction:
Improveoutput voltage stabilityVSAvoidcontrol loop structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The control function is segmented into two independent loops: the first control loop rapidly responds to transient load changes to maintain immediate voltage stability, while the second control loop provides longer-term voltage regulation. This segmentation enables the system to achieve both fast transient response and long-term stability without requiring an overly complex single-loop design.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces intermediate elements including a first current mirror as an intermediary for fast response and a second current mirror as an intermediary for feedback control. These intermediaries enable the dual-loop structure to coordinate between transient response and long-term stability functions.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If the LDO regulator uses a single current mirror, then the device complexity is low, but it cannot deliver rapid current response to minimize voltage droop

Engineering Contradiction:
Improvecurrent delivery speedVSAvoidcurrent mirror configuration
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The current delivery function is segmented between two current mirrors: the first current mirror is dedicated to rapid current delivery for transient response, while the second current mirror handles feedback and long-term regulation. This segmentation allows the first current mirror to be optimized for speed without the constraints of a single unified design.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic control by having the first current mirror operate independently for fast transient response and the second current mirror provide feedback-based dynamic adjustment. This dynamic architecture enables rapid current delivery while maintaining adaptability through feedback control.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11287839B2Dual loop LDO voltage regulator
Publication Date: 2022.03.29 APPLE INC
  • US11287839B2 patent drawing
  • US11287839B2 patent drawing
  • US11287839B2 patent drawing

AI summary

A dual loop LDO voltage regulator is disclosed. The voltage regulator circuit includes a first current mirror having first and second transistors having source terminals coupled to an input voltage node. The circuit further includes a second current mirror having third and fourth transistors, wherein drain terminals of the third and fourth transistors are coupled to drain terminals of the first and second transistors, respectively. A feedback circuit is coupled between source terminals of the third and fourth transistors, and is configured to generate a feedback signal based on a reference voltage and an output voltage present on the source terminal of the fourth transistor. The first and second current mirrors form a first control loop, and wherein the first and second current mirrors and the feedback circuit form a second control loop.