Dual-Loop Low Voltage Regulator for Fast, Stable IC Supply

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Solution Overview

Problem

Integrated circuits with small process nodes, such as those equal to or less than 10 nanometers, face challenges in regulating low voltages effectively due to sensitivity to voltage variations, requiring enhanced voltage regulation to ensure reliable operation of multigate transistors.

Innovation Solution

A dual-loop voltage regulation system is implemented, comprising a 'high gain slow' loop for low frequency domain regulation and a 'low gain fast' loop for high frequency domain regulation, using a differential opamp with a high gain and a self-bias circuit to provide a stable output voltage across a range of 0.8 to 1.2 volts, with a resistor ladder and capacitors for feedback and dampening.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single voltage regulation loop is used, then the device complexity is reduced, but the ability to provide clean voltage across wide frequency range deteriorates

Engineering Contradiction:
Improvevoltage regulation system complexityVSAvoidvoltage regulation quality
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The voltage regulation system is segmented into two independent control loops: a first control loop optimized for low-frequency regulation and a second control loop optimized for high-frequency regulation. Each loop has its own error amplifier and feedback path, allowing independent optimization of regulation performance across different frequency domains without requiring a single complex loop design.

Inventive Principle:
Principle #1Segmentation

2Use of energy by moving object

If multigate transistors operate at low voltages, then power consumption is reduced, but voltage regulation difficulty increases

Engineering Contradiction:
Improvepower consumptionVSAvoidvoltage regulation system complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The regulation system is divided into two loops with different gain and bandwidth characteristics. The first loop provides high gain for low-frequency regulation to maintain precision at low voltages, while the second loop provides fast response for high-frequency transient suppression. This segmentation allows effective low-voltage regulation without requiring excessive complexity in a single loop.

Inventive Principle:
Principle #1Segmentation

3Measurement precision

If high gain is used in voltage regulation, then regulation precision is improved, but response speed deteriorates

Engineering Contradiction:
Improvevoltage regulation precisionVSAvoidresponse speed
Core Design Contradiction:
Measurement precisionVSSpeed

Solution Approach 1:

The system separates precision regulation and fast response functions into two distinct loops. The first loop uses high gain error amplifiers optimized for precision low-frequency regulation, while the second loop uses lower gain amplifiers with higher bandwidth optimized for fast transient response. This eliminates the trade-off by assigning different optimization goals to separate loops.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The solution moves from a single-dimensional optimization (trying to maximize both gain and bandwidth in one loop) to a two-dimensional approach by adding a second control loop. This allows independent optimization of gain and bandwidth across different frequency dimensions, achieving both precision and speed simultaneously through dimensional expansion of the control architecture.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentEP3649531B1Low voltage regulator
Publication Date: 2021.07.28 XILINX INC
  • EP3649531B1 patent drawingFigure 1
  • EP3649531B1 patent drawingFigure 2
  • EP3649531B1 patent drawingFigure 3-1

AI summary

Apparatus and method relating to voltage regulation is disclosed. In an apparatus thereof, an integrated circuit (100, 200) includes a first differential opamp (120) having a first gain. The first differential opamp is configured to receive a reference voltage (106) and a feedback voltage (141). A second differential opamp (110) has a second gain less than the first gain. The second differential opamp is configured to receive the reference voltage and the feedback voltage. A driver transistor (104) is configured to provide an output voltage (150) at an output voltage node (140) and to receive a gating voltage (148) output from the second differential opamp. A differential output (121) of the first differential opamp is configured for gating a current source transistor (115) of the second differential opamp. A capacitor (135) is connected to the driver transistor and the current source transistor.