Dual-Loop PLL Biasing for Charge Pump Linearity
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Solution Overview
Problem
Dual-loop phase-locked loop (PLL) circuits face challenges in maintaining charge pumps and voltage control oscillators within a desired linear working range, leading to spurious tones due to varying control voltages.
Innovation Solution
The PLL circuit generates offset currents in one loop to stabilize charge pumps and uses a direct current adjustment voltage in another loop to control the control voltage outputted to the voltage control oscillator, ensuring both operate within a linear range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If dual-loop design is adopted to reduce capacitor area, then area occupied by capacitors is reduced, but charge pumps cannot effectively operate within desired linear working range causing spurious tone
Solution Approach 1:
The patent introduces offset currents as adjustable parameters to shift the operating point of charge pumps into the desired linear working range. By modifying the current parameters through offset injection, the charge pumps operate linearly despite the reduced capacitor area in dual-loop configuration.
Solution Approach 2:
The patent uses offset currents as intermediary elements that mediate between the dual-loop structure and the charge pumps. These offset currents act as a bridge to ensure charge pumps operate within linear range while maintaining the area-reducing benefits of dual-loop design.
2Area of stationary object
If dual-loop design is adopted to reduce capacitor area, then area occupied by capacitors is reduced, but spurious tone is generated
Solution Approach 1:
By adjusting the offset current parameters, the patent shifts the operating conditions to eliminate spurious tones. The parameter modification ensures that charge pumps operate in their linear region, preventing the generation of spurious spectral components while maintaining compact capacitor design.
Solution Approach 2:
The patent converts the potential harm of operating outside linear range into a benefit by intentionally introducing offset currents that pre-bias the system. This pre-biasing transforms what would be a harmful operating condition into a beneficial linear operating point, eliminating spurious tones.
3Productivity
If control voltages vary significantly and continuously, then PLL operation is dynamic, but VCO cannot effectively keep operating within linear working range
Solution Approach 1:
The patent introduces a DC adjustment voltage parameter to control the VCO's operating point. By superimposing this DC voltage on the dynamic control voltages, the VCO is biased to operate within its linear range while still responding dynamically to frequency adjustment requirements.
Solution Approach 2:
The DC adjustment voltage acts as an intermediary that mediates between the dynamic control signals and the VCO's linear operating range. It provides a stable bias foundation that allows the VCO to maintain linearity while processing dynamic frequency control commands.
Data Source
AI summary
A phase-locked loop (PLL) circuit is provided. The PLL circuit includes a phase frequency detector (PFD), a first charge pump (CP), a second CP, a first loop component set, a second loop component set, a voltage control oscillator (VCO) and a frequency divider. The first CP and the second CP are coupled to the PFD. The first loop component set is coupled between the first CP and the VCO. The second loop component set is coupled between the second CP and the VCO. The frequency divider is coupled between the PFD and the VCO. The first loop component set generates an offset current to adjust the working range of the first CP and the second CP. The second loop component set generates an offset current and a DC adjustment voltage to control the control voltage outputted to the VCO.