Dual-Loop PLL Calibration for Low-Noise Wide-Range VCO Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Phase-locked loop (PLL) circuits face challenges in minimizing the sensitivity of synthesized frequency to noise while maintaining a wide frequency range, as reducing voltage-controlled oscillator (VCO) gain limits the frequency range.
Innovation Solution
A PLL architecture that incorporates both digital and analog calibration loops to control the VCO, with a digital calibration loop providing coarse calibration and an analog calibration loop offering fine tuning, allowing for low VCO gain and reduced noise sensitivity, enabling on-chip integration of loopfilter components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If VCO gain is reduced to minimize noise sensitivity, then noise sensitivity is improved, but frequency range is reduced
Solution Approach 1:
The calibration system is segmented into two independent loops: a digital calibration loop for coarse frequency adjustment and an analog calibration loop for fine frequency adjustment. This segmentation allows each loop to be optimized independently - the digital loop can use higher gain for faster settling without noise concerns, while the analog loop uses lower gain for noise immunity, collectively achieving both wide frequency range and low noise sensitivity
Solution Approach 2:
The digital calibration loop acts as an intermediary that performs preliminary coarse calibration of the VCO frequency before the analog calibration loop performs fine tuning. This intermediary digital calibration step removes the need for the analog loop to handle large frequency corrections, allowing the analog loop to operate at low gain for noise immunity while the digital loop provides the necessary wide-range frequency adjustment capability
2Measurement precision
If analog calibration loop is used for fine tuning, then frequency precision is improved, but device complexity increases
Solution Approach 1:
The calibration function is segmented between digital and analog domains, with the digital loop handling coarse calibration and the analog loop handling fine calibration. This segmentation allows the system to achieve high frequency precision through the analog loop while keeping overall complexity manageable by dividing responsibilities and allowing independent optimization of each loop
Solution Approach 2:
The patent merges digital and analog calibration approaches into a unified two-loop system. The digital calibration loop and analog calibration loop are combined such that their outputs are summed and applied to the VCO, creating a hybrid system that leverages the advantages of both digital (precision, programmability) and analog (continuous adjustment, low noise) domains while distributing complexity across two simpler, coordinated loops
Data Source
AI summary
A phase-locked loop (PLL) architecture (100) is provided that includes a voltage-controlled oscillator (VCO) (116). The PLL architecture (100) also includes a digital calibration loop (132) coupled to the VCO (116). The digital calibration loop (132) implements a digital filter (126) to provide a digital control to the VCO (116) for centering a VCO frequency output. The PLL architecture (100) also includes an analog calibration loop (130) coupled to the VCO (116). The analog calibration loop (130) provides an analog control to the VCO (116) for adjusting the centered VCO frequency output.