Dual-Loop PLL Phase Alignment With De-Correlated Phase Noise
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing Phase-Locked Loops (PLLs) face a tradeoff between capture and hold range and noise decorrelation, where a narrow loop bandwidth is needed for phase noise measurement and noise cancellation systems but results in instability, while a wide bandwidth is required for robust frequency locking, especially when high-frequency oscillators are locked to low-frequency references.
Innovation Solution
A dual-loop phase-locking circuit is introduced, combining a conventional phase-frequency-detector (PFD) and frequency-divider based first loop for frequency locking with a second loop that integrates phase errors and applies an offset to reduce phase errors within a narrower bandwidth, decoupling capture range from loop bandwidth and optimizing noise performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a narrow loop bandwidth is used in a PLL, then phase noise decorrelation is improved, but capture and hold range deteriorates
Solution Approach 1:
The patent divides the single PLL loop into two separate loops: a first loop with narrow bandwidth for phase noise decorrelation and a second loop with wide bandwidth for capture and hold. This segmentation allows each loop to be optimized for its specific function without compromising the other, directly resolving the technical contradiction between phase noise performance and capture range.
2Adaptability or versatility
If a wide loop bandwidth is used in a PLL, then capture and hold range is improved, but phase noise decorrelation deteriorates
Solution Approach 1:
The patent segments the phase-locking function into two independent loops with different bandwidth characteristics. The second loop uses wide bandwidth to ensure robust capture and hold capability, while the first loop uses narrow bandwidth to maintain excellent phase noise decorrelation, thus resolving the contradiction in favor of both parameters simultaneously.
Solution Approach 2:
The patent transitions from a single-dimensional loop bandwidth parameter to a two-dimensional solution space by introducing dual loops with different bandwidths. This allows the system to operate at multiple points in the bandwidth dimension, selecting the appropriate loop for each specific function (capture vs. noise performance) rather than being constrained to a single bandwidth value.
3Measurement precision
If loop bandwidth is optimized for phase noise measurement, then noise decorrelation is improved, but frequency locking stability deteriorates
Solution Approach 1:
The patent segments the locking function into two specialized loops: the first loop optimized for noise decorrelation with narrow bandwidth, and the second loop optimized for frequency locking stability with wide bandwidth. This segmentation allows the system to achieve both noise measurement precision and frequency locking reliability simultaneously by operating both loops in parallel.
Data Source
AI summary
A dual-loop phase-locking circuit combines a conventional phase-frequency-detector (PFD) and frequency-divider based first loop to lock an output signal frequency to a multiple of a reference signal frequency within a first loop bandwidth BW1 with a second loop to simultaneously lock the output signal phase to a second signal independently locked to the same multiple of the reference signal. The second loop integrates the phase error between the output signal and the second signal, and applies an offset at the PFD output in the first loop to reduce the first loop phase errors within a second loop bandwidth BW2 (<BW1). The first loop bandwidth BW1 can be optimized for overall phase-noise performance of the output signal while retaining the excellent capture and hold characteristics of that loop's topology. The second loop provides superior carrier-frequency phase alignment between the output signal and second signal. The output and second signal may therefore be configured as inputs to systems that require highly coherent carrier signals with de-correlated phase-noise such as phase-noise measurement systems or phase-noise cancellation systems.