Dual Lower Electrodes for Phase Change Memory Contact Resistance
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Solution Overview
Problem
Phase change memory devices face challenges in forming an ohmic contact between titanium nitride lower electrodes and cobalt silicide layers, leading to increased contact resistance and reduced sensing margins, while also requiring lower operating currents which can be achieved by optimizing the lower electrode design to reduce contact resistance with phase change materials.
Innovation Solution
The implementation of dual lower electrodes with a buffer pattern, where the first conductive layer is more readily oxidized and the second has higher resistance, and a buffer pattern including an oxide, to create a reduced contact area with the phase change material, enhancing heat generation efficiency and reducing program current requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If a titanium nitride lower electrode is used to prevent reaction with phase change material, then stability is improved, but contact resistance with cobalt silicide layer increases
Solution Approach 1:
The lower electrode is divided into two separate layers: a titanium nitride layer for stability and a separate cobalt silicide layer for low contact resistance. This segmentation allows each layer to perform its specialized function without compromise.
Solution Approach 2:
The cobalt silicide layer acts as an intermediary between the titanium nitride lower electrode and the phase change material, providing the necessary ohmic contact while the titanium nitride maintains its protective role.
2Reliability
If write current is increased to reduce contact resistance effects, then reliability is improved, but energy consumption increases
Solution Approach 1:
By segmenting the lower electrode into specialized layers, the system achieves low contact resistance without requiring excessive program current, thus maintaining reliability while reducing energy consumption.
Solution Approach 2:
The invention changes the electrical parameters at the electrode interfaces through material selection and layer结构设计, achieving optimal contact resistance that allows operation at lower currents while maintaining sensing margins.
3Reliability
If lower electrode contact area with phase change material is increased to reduce contact resistance, then reliability is improved, but heat generation efficiency decreases
Solution Approach 1:
The lower electrode structure implements local quality by having different contact characteristics in different regions: the cobalt silicide provides low contact resistance at the interface, while the overall contact area is optimized to concentrate heat generation where needed in the phase change material.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves phase change efficiency by increasing heat generation at the interface and reducing the program current, while maintaining low contact resistance with the switching device, thus optimizing the phase change memory cell's performance.
Implementation Method 1
When a write current flows through the switching device and the lower electrode, Joule heat is generated at an interface between the phase change material pattern and the lower electrode.
Implementation Method 2
The buffer pattern may include an oxide containing at least one element constituting the first conductive layer pattern
Data Source
AI summary
A semiconductor device includes a semiconductor substrate and a lower interlayer insulating layer disposed on the substrate. An opening passing through the lower interlayer insulating layer and exposing the substrate is included. A buried insulating pattern is disposed in the opening. First and second conductive layer patterns are sequentially stacked to surround the sidewall and bottom of the buried insulating pattern. A phase change material pattern is included, which is disposed on the lower interlayer insulating layer in contact with a top surface of the second conductive layer pattern, and spaced apart from the first conductive layer pattern. An upper interlayer insulating layer covering the lower interlayer insulating layer and the phase change material pattern is included. A conductive plug is included, which passes through the upper interlayer insulating layer and is electrically connected to the phase change material pattern. A method of fabricating the semiconductor device is also provided.