Dual Mailbox Inter-Processor Communication for Power Reduction
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Solution Overview
Problem
Conventional inter-processor communication methods are inefficient in terms of power consumption, particularly when a processor is in a low power mode, as they require waking up the CPU to handle interrupts for both high and low priority messages, which consumes time and energy.
Innovation Solution
Implementing a dual mailbox system where high priority messages trigger interrupts, while low priority messages are stored in a separate mailbox and only retrieved when necessary, allowing the CPU to remain in low power mode until needed, thereby reducing the number of interruptions and conserving power.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an interrupt request is sent for every message to ensure timely processing, then message responsiveness is improved, but power consumption increases due to frequent CPU wake-ups
Solution Approach 1:
The mailbox is divided into two separate mailboxes: a first mailbox for high priority messages and a second mailbox for low priority messages. This segmentation allows the system to differentiate message importance and apply different handling strategies, enabling the CPU to remain in low power mode for non-critical communications while maintaining responsiveness for urgent messages.
Solution Approach 2:
Different quality of service is applied to different message types by directing them to different mailboxes. High priority messages receive immediate interrupt-based handling, while low priority messages are handled asynchronously without interrupts. This local quality differentiation resolves the contradiction by optimizing power consumption for routine messages while preserving responsiveness for critical messages.
2Speed
If the CPU wakes up to handle every interrupt to maintain system responsiveness, then processing speed is improved, but time loss increases due to frequent state restoration
Solution Approach 1:
The interrupt handling process is segmented based on message priority. Only high priority messages from the first mailbox trigger CPU wake-ups and state restorations, while low priority messages in the second mailbox are handled during normal operation or scheduled wake-ups. This reduces the frequency of time-consuming state restoration operations while maintaining processing speed for critical messages.
Solution Approach 2:
The system performs preliminary classification of messages into high and low priority categories before processing. This allows the CPU to anticipate which messages require immediate attention and which can be handled during scheduled wake-ups or idle periods, minimizing unnecessary state restorations and associated time losses.
3Device complexity
If a single mailbox is used for all messages to simplify the communication mechanism, then device complexity is reduced, but message priority handling becomes inefficient
Solution Approach 1:
The communication mechanism is segmented into two mailboxes with distinct purposes. This segmentation, while increasing structural complexity, enables efficient priority-based message handling by separating critical communications from routine communications, ultimately improving overall system productivity through optimized processing paths.
Solution Approach 2:
Different handling qualities are applied to different message streams. High priority messages receive dedicated interrupt-based handling with immediate CPU attention, while low priority messages use asynchronous handling. This local quality differentiation in the mailbox structure significantly improves priority message handling efficiency compared to a unified mailbox approach.
Data Source
AI summary
An electronic device comprises a first processor and a second processor. An inter-processor communication module is connected to the processors and comprises a high priority mailbox and a low priority mailbox. The first processor sends a high or low priority message to the second processor. The first processor is arranged such that if it has a high priority message to send to the second processor, the first processor places the high priority message in the high priority mailbox and sends an interrupt request to the second processor. However, when the first processor has a low priority message to send to the second processor, the first processor places the high priority message in the low priority mailbox to be checked later without sending an interrupt request to the second processor.