Dual-Mask Etching for Smaller Semiconductor Features
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Solution Overview
Problem
As DRAM technology advances towards smaller dimensions, the feature size of exposure lines approaches the theoretical resolution limit of the exposure system, leading to severe distortion of the photolithography image and degradation of semiconductor device quality.
Innovation Solution
A method of manufacturing semiconductor devices involves forming patterned first and second mask layers using materials like silicon oxide, silicon nitride, and titanium nitride, with a large etching selection ratio, allowing for larger mask feature sizes while maintaining device feature size, thereby reducing device size, improving yield, and saving costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the feature size of exposure lines is reduced to increase circuit density, then the capacity per unit area increases, but the photolithography image becomes severely distorted and device quality degrades
Solution Approach 1:
The patent divides the single mask layer into two separate mask layers (first mask layer and second mask layer). Each mask layer can be optimized independently, allowing the formation of complex patterns without requiring excessive miniaturization of single mask features. This segmentation enables maintaining larger mask feature sizes while achieving higher circuit density through the combined pattern definition capability of both layers.
Solution Approach 2:
The patent transitions from a two-dimensional single mask layer approach to a three-dimensional multi-layer mask structure. By stacking the first and second mask layers vertically and using their combined projection patterns, the system achieves higher pattern density without reducing the lateral dimensions of individual mask features, thus avoiding photolithography resolution limits.
2Length of moving object
If the mask feature size is reduced to maintain device feature size, then the device size can be reduced, but the mask manufacturing becomes more difficult and costly
Solution Approach 1:
By dividing the mask structure into two separate mask layers, each layer can be manufactured with larger, more manageable feature sizes that are within the capabilities of existing photolithography equipment. The combined effect of both layers achieves the desired small device feature size without requiring either individual mask layer to be manufactured at excessively small dimensions.
Solution Approach 2:
The patent changes the structural parameters of the mask system from a single thin layer to multiple layers with different thicknesses and material compositions. This parameter change allows the use of larger mask features in each layer while still achieving the required resolution for small device features through the cumulative effect of multiple layers, thereby improving manufacturability.
Data Source
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AI summary
Embodiments provide a semiconductor device and a method of manufacturing the same. The method includes: providing a layer to be etched; forming a patterned first mask layer on the layer to be etched; forming a patterned second mask layer formed on the layer to be etched, the second mask layer and the first mask layer jointly defining openings to expose the layer to be etched; and etching the layer to be etched using the first mask layer and the second mask layer as masks so as to form a pattern to be etched. The above-described method of manufacturing the semiconductor device allows the feature size of the first mask layer and the second mask layer to be relatively larger while keeping the device feature size the same, makes it possible to further reduce the feature size of the device, and it may also improve the yield of the device and save the cost.