Dual-Material Interconnect Structure for Dense IC Wiring
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Solution Overview
Problem
As semiconductor integrated circuits (ICs) are scaled down, the increased density and reduced spacing between conductive features lead to increased capacitance, power consumption, and time delay, necessitating manufacturing techniques and device designs that reduce IC size while maintaining performance.
Innovation Solution
The use of interconnect conductive structures comprising two different conductive materials, where a first material with suitable properties for critical dimensions below a threshold is surrounded by an outer portion of the same material, and a second material with better properties for dimensions above the threshold, ensuring reliable electrical pathways.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the spacing between conductive features is reduced to increase density, then the IC size is reduced, but the capacitance increases leading to higher power consumption and time delay
Solution Approach 1:
The patent applies local quality by using different conductive materials in different regions of the interconnect structure. Specifically, copper is used in the core region where current density is highest, while aluminum or copper-alloy materials are used in the outer regions. This material differentiation optimizes electrical performance locally, reducing overall resistance and capacitance effects, thereby lowering power consumption and time delay while maintaining reduced IC dimensions.
2Volume of moving object
If the spacing between conductive features is reduced to increase density, then the IC size is reduced, but the capacitance increases leading to time delay
Solution Approach 1:
The patent applies local quality by using different conductive materials in different regions of the interconnect structure. Specifically, copper is used in the core region where current density is highest, while aluminum or copper-alloy materials are used in the outer regions. This material differentiation optimizes electrical performance locally, reducing overall resistance and capacitance effects, thereby lowering power consumption and time delay while maintaining reduced IC dimensions.
3Ease of manufacture
If a single conductive material is used in the interconnect structure, then the manufacturing process is simpler, but the electrical performance is insufficient for varying critical dimensions
Solution Approach 1:
The patent applies local quality by using different conductive materials in different regions of the interconnect structure. Specifically, copper is used in the core region where current density is highest, while aluminum or copper-alloy materials are used in the outer regions. This material differentiation optimizes electrical performance locally, reducing overall resistance and capacitance effects, thereby lowering power consumption and time delay while maintaining reduced IC dimensions.
Solution Approach 2:
The patent employs composite materials by combining different conductive materials (copper, aluminum, copper-alloys) within a single interconnect structure. The core region uses copper for its superior electrical properties, while the outer regions use aluminum or copper-alloys. This composite approach allows the structure to leverage the advantages of each material, achieving optimal electrical performance across varying critical dimensions while maintaining manufacturability through established deposition and planarization processes.
Data Source
AI summary
In some embodiments, the present disclosure relates to an integrated chip that includes a first interconnect dielectric layer arranged over a substrate, a second interconnect dielectric layer arranged over the first interconnect dielectric layer, and an interconnect conductive structure arranged within the second interconnect dielectric layer. The interconnect conductive structure includes an outer portion that has a first conductive material. Further, the interconnect conductive structure includes a central portion having outermost sidewalls surrounded by the outer portion of the interconnect conductive structure. The central portion includes a second conductive material different than the first conductive material.


