Dual-Memory ECC Storage Layout for High-Efficiency Data Access
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Solution Overview
Problem
Existing data storage systems face issues with memory bit width expansion and reduced reading and writing efficiency due to conventional error correction code (ECC) schemes, which are either memory-intensive or inefficient in command generation.
Innovation Solution
A data storage system utilizing two general-purpose memories, each storing data and its corresponding error correction code, controlled by a controller to manage data writing and reading efficiently without expanding memory bit widths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If sideband ECC scheme is used, then error correction capability is improved, but memory bit width must be extended which increases device complexity and development difficulty
Solution Approach 1:
The patent divides the memory storage into two independent parts: data storage area and ECC storage area. The ECC code is stored separately in a dedicated area rather than being integrated into the data bits, allowing the memory bit width to remain unchanged while still providing error correction capability.
Solution Approach 2:
The patent introduces a controller as an intermediary component that manages the interaction between data reading/writing and ECC code reading/writing. The controller generates separate commands for ECC code access, mediating between the main data operations and the error correction operations to maintain system efficiency.
2Device complexity
If inline ECC scheme is used, then memory bit width is maintained, but separate read and write commands are generated which reduces reading and writing efficiency
Solution Approach 1:
The patent pre-positions the ECC code in a dedicated storage area alongside the data, so that when data is read or written, the corresponding ECC code is already available for immediate use. This preliminary arrangement eliminates the need for separate sequential commands and enables efficient parallel operations.
Solution Approach 2:
The patent combines the data storage and ECC storage into a unified memory structure where both are accessed through the same memory interface. By merging the storage locations and using a unified control mechanism, the system can perform data and ECC operations simultaneously without generating separate commands, thus maintaining high productivity.
3Quantity of substance
If ECC code is stored in data storage space, then memory utilization is improved, but reading and writing efficiency is reduced due to separate command generation
Solution Approach 1:
The patent assigns different functional qualities to different regions of the memory: the data storage area is optimized for high-speed data access, while the ECC storage area is optimized for error correction operations. Each region has specialized access patterns, allowing the system to maintain high productivity in data operations while ensuring reliable error correction.
Data Source
AI summary
Provided are a data storage system and method. The system includes a first memory, a second memory, and a controller. The first memory is configured to store first data or second data, the first data is first storage data, and the second data includes the first storage data and a second error correction code corresponding to second storage data; the second memory is configured to store third data or fourth data, the third data is the second storage data, and the fourth data includes the second storage data and a first error correction code corresponding to the first storage data; and the controller is further configured to control data writing and data reading of the first memory and/or the second memory. The present disclosure reduces the development difficulty of the data storage system and ensures the reading and writing efficiency of the data storage system at the same time.