Dual-Memory System for High-Bandwidth, Low-Energy Access

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Solution Overview

Problem

Existing memory systems face thermally-induced bandwidth limitations during high-performance operations, which are not adequately mitigated by reducing power consumption or increasing pin count, leading to reduced bandwidth and increased operating temperatures.

Innovation Solution

A memory system comprising a first memory device configured for low-energy, high-bandwidth operations using pulse-amplitude modulation with three or more voltage levels and a second memory device for high-density storage, along with a controller to manage data access between these devices, thereby increasing bandwidth without increasing pin count.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If power consumption is reduced to mitigate thermal effects, then energy efficiency improves, but bandwidth is reduced

Engineering Contradiction:
Improveenergy consumptionVSAvoidbandwidth
Core Design Contradiction:
Use of energy by moving objectVSProductivity

Solution Approach 1:

The memory system is divided into two distinct memory devices: a first memory device optimized for low-energy, high-bandwidth operations and a second memory device optimized for high-density storage. This segmentation allows each device to specialize in different operational characteristics, resolving the contradiction between energy efficiency and bandwidth by assigning the high-bandwidth function to the first device while the second device provides capacity.

Inventive Principle:
Principle #1Segmentation

2Productivity

If pin count is increased to provide wider I/O configuration, then bandwidth increases, but manufacturing cost increases

Engineering Contradiction:
ImprovebandwidthVSAvoidmanufacturing cost
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The system uses a first memory device with a first pin configuration and a second memory device with a second pin configuration. The controller manages data access between these devices, enabling high bandwidth through coordinated access to the first device (which has sufficient pin count for high-speed operations) while the second device provides additional capacity without requiring proportional increases in total pin count.

Inventive Principle:
Principle #1Segmentation

3Quantity of substance

If memory density is increased to boost capacity, then storage capacity improves, but access energy increases

Engineering Contradiction:
Improvestorage capacityVSAvoidaccess energy
Core Design Contradiction:
Quantity of substanceVSUse of energy by moving object

Solution Approach 1:

The memory system separates storage functions into two devices: the first memory device provides low-density, low-energy access storage for frequently accessed data, while the second memory device provides high-density storage for less frequently accessed data. The controller intelligently manages data placement and access, ensuring that energy-intensive operations are minimized by keeping actively used data in the first device.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the memory system are optimized for different characteristics: the first memory device is optimized for energy-efficient access with lower density, while the second memory device is optimized for high density with acceptable access energy characteristics. This local optimization resolves the contradiction by allowing high capacity in the second device while maintaining low access energy for critical data in the first device.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20250278204A1Memory system and operations of the same
Publication Date: 2025.09.04 LODESTAR LICENSING GROUP LLC
  • US20250278204A1 patent drawing
  • US20250278204A1 patent drawing
  • US20250278204A1 patent drawing

AI summary

Methods, systems, and devices related to a memory system or scheme that includes a first memory device configured for low-energy access operations and a second memory device configured for storing high-density information and operations of the same are described. The memory system may include an array configured for high-density information and may interface with a host via a controller and a cache or another array of a relatively fast memory type. The memory system may support signals communicated according to one or several modulation schemes, including a modulation scheme or schemes that employ two, three, or more voltage levels (e.g., NRZ, PAM4). The memory system may include, e.g., separate channels configured to communicate using different modulation schemes between a host and between memory arrays or memory types within the memory system.